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b75e8642a6
x86 isel peeps. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92509 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
874 B
LLVM
25 lines
874 B
LLVM
;; X's live range extends beyond the shift, so the register allocator
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;; cannot coalesce it with Y. Because of this, a copy needs to be
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;; emitted before the shift to save the register value before it is
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;; clobbered. However, this copy is not needed if the register
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;; allocator turns the shift into an LEA. This also occurs for ADD.
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; Check that the shift gets turned into an LEA.
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; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
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; RUN: not grep {mov E.X, E.X}
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@G = external global i32 ; <i32*> [#uses=3]
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define i32 @test1(i32 %X, i32 %Y) {
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%Z = add i32 %X, %Y ; <i32> [#uses=1]
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volatile store i32 %Y, i32* @G
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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define i32 @test2(i32 %X) {
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%Z = add i32 %X, 1 ; <i32> [#uses=1]
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volatile store i32 %Z, i32* @G
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ret i32 %X
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}
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