Tom Stellard 860cabe1e6 R600/SI: Implement VGPR register spilling for compute at -O0 v3
VGPRs are spilled to LDS.  This still needs more testing, but
we need to at least enable it at -O0, because the fast register
allocator spills all registers that are live at the end of blocks
and without this some future commits will break the
flat-address-space.ll test.

v2: Only calculate thread id once

v3: Move insertion of spill instructions to
    SIRegisterInfo::eliminateFrameIndex()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:17 +00:00
2014-08-14 15:15:09 +00:00
2014-09-02 22:28:02 +00:00
2014-09-12 11:08:59 +00:00
2014-09-23 17:35:28 +00:00
2014-08-14 15:15:09 +00:00

Low Level Virtual Machine (LLVM)
================================

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