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ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
2.2 KiB
LLVM
59 lines
2.2 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C1
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C2
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PE
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST1
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST2
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;
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR32
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@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1
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define i32 @main() nounwind {
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entry:
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%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0))
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ret i32 0
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; SR: .set mips16
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; SR32: .set nomips16
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; SR32: .ent main
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; SR-NOT: .set noreorder
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; SR-NOT: .set nomacro
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; SR-NOT: .set noat
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; SR32: .set noreorder
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; SR32: .set nomacro
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; SR32: .set noat
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; SR: save $ra, 24 # 16 bit inst
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; PE: .ent main
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; PE: li $[[T1:[0-9]+]], %hi(_gp_disp)
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; PE-NEXT: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
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; PE: sll $[[T3:[0-9]+]], $[[T1]], 16
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; C1: lw ${{[0-9]+}}, %got($.str)(${{[0-9]+}})
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; C2: lw ${{[0-9]+}}, %call16(printf)(${{[0-9]+}})
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; C1: addiu ${{[0-9]+}}, %lo($.str)
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; C2: move $25, ${{[0-9]+}}
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; C1: move $gp, ${{[0-9]+}}
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; C1: jalrc ${{[0-9]+}}
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; SR: restore $ra, 24 # 16 bit inst
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; PE: li $2, 0
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; PE: jrc $ra
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; ST1: li ${{[0-9]+}}, %hi($.str)
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; ST1: sll ${{[0-9]+}}, ${{[0-9]+}}, 16
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; ST1: addiu ${{[0-9]+}}, %lo($.str)
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; ST2: li ${{[0-9]+}}, %hi($.str)
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; ST2: jal printf
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}
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; SR-NOT: .set at
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; SR-NOT: .set macro
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; SR-NOT: .set reorder
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; SR32: .set at
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; SR32: .set macro
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; SR32: .set reorder
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; SR: .end main
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; SR32: .end main
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declare i32 @printf(i8*, ...)
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