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9ff542f2cc
2. Added argument to instruction scheduler creators so the creators can do special things. 3. Repaired target hazard code. 4. Misc. More to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29450 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.3 KiB
C++
36 lines
1.3 KiB
C++
//===-- CodeGen/MachineInstr.cpp ------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by James M. Laskey and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the machine function pass registry for register allocators
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// and instruction schedulers.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachinePassRegistry.h"
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using namespace llvm;
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//===---------------------------------------------------------------------===//
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///
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/// RegisterRegAlloc class - Track the registration of register allocators.
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///
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//===---------------------------------------------------------------------===//
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MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
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RegisterRegAlloc::Registry;
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//===---------------------------------------------------------------------===//
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///
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/// RegisterScheduler class - Track the registration of instruction schedulers.
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///
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//===---------------------------------------------------------------------===//
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MachinePassRegistry<RegisterScheduler::FunctionPassCtor>
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RegisterScheduler::Registry;
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