Nirav Dave c8f9ada8c6 [X86] Fix intel syntax push parsing bug ... Change erroneous parsing of push immediate instructions in intel syntax to default to pointer size by rewriting into the ATT style for matching. This fixes PR22028. Reviewers: majnemer, rnk Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25288 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283457 91177308-0d34-0410-b5e6-96231b3b80d8		2016-10-06 15:28:08 +00:00
..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s	[AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions.	2016-08-03 10:58:05 +00:00
avx512-err.s
avx512bw-encoding.s
avx512ifma-encoding.s
avx512ifmavl-encoding.s
avx512vbmi-encoding.s
avx512vl-encoding.s
cfi_def_cfa-crash.s
code16gcc.s	Add support for Code16GCC	2016-09-26 19:33:36 +00:00
compact-unwind.s
encoder-fail.s
error-reloc.s
expand-var.s
faultmap-section-parsing.s
fde-reloc.s
fixup-cpu-mode.s
fp-setup-macho.s	X86: loosen an overly aggressive MachO assertion	2016-09-20 17:05:04 +00:00
gnux32-dwarf-gen.s
hex-immediates.s
i386-darwin-frame-register.ll
imm-comments.s
index-operations.s
inline-asm-obj.ll
intel-syntax-2.s
intel-syntax-ambiguous.s
intel-syntax-avx512.s
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s	[MC] Fix Intel Operand assembly parsing for .set ids	2016-08-02 17:56:03 +00:00
intel-syntax-error.s	[X86] Don't randomly encode %rip where illegal	2016-10-05 15:23:35 +00:00
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-print.ll
intel-syntax-ptr-sized.s
intel-syntax-unsized-memory.s
intel-syntax-x86-64-avx512f_vl.s
intel-syntax-x86-64-avx.s
intel-syntax.s
invalid_opcode.s
invalid-sleb.s
large-bss.s
lit.local.cfg
macho-reloc-errors-x86_64.s
macho-reloc-errors-x86.s
macho-uleb.s
mpx-encodings.s
no-elf-compact-unwind.s
padlock.s
pr22028.s	[X86] Fix intel syntax push parsing bug	2016-10-06 15:28:08 +00:00
pr28547.s
relax-insn.s
reloc-bss.s
reloc-directive.s
reloc-macho.s
reloc-undef-global.s
ret.s	[x86] Accept 'retn' as an alias to 'ret[lqw]'\'ret' (At&t\Intel)	2016-09-28 15:52:56 +00:00
sgx-encoding.s
shuffle-comments.s
stackmap-nops.ll
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	[X86] Don't randomly encode %rip where illegal	2016-10-05 15:23:35 +00:00
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s	[X86] Improve code size on X86 segment moves	2016-08-08 18:01:04 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s	[X86] Improve code size on X86 segment moves	2016-08-08 18:01:04 +00:00
x86-64-avx512bw_vl.s
x86-64-avx512bw.s
x86-64-avx512cd_vl.s
x86-64-avx512cd.s
x86-64-avx512dq_vl.s
x86-64-avx512dq.s
x86-64-avx512f_vl.s
x86-64.s
x86-branch-relaxation.s
x86-evenDirective.s
x86-itanium.ll
x86-target-directives.s
x86-windows-itanium-libcalls.ll
X86_64-pku.s