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0dec0e1ea5
These pseudo instructions are only lowered after register allocation and are therefore still present when the machine scheduler runs. Add a run: line to a testcase that uses the uncommon flags necessary to actually produce a LDRLIT instruction on swift. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242587 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
1.5 KiB
LLVM
30 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -relocation-model=pic | FileCheck %s --check-prefix=CHECK --check-prefix=PIC
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; RUN: llc < %s -mtriple=thumbv7-apple-ios -relocation-model=pic -mcpu=swift -mattr=+no-movt | FileCheck %s --check-prefix=CHECK --check-prefix=PIC-NOMOVT
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%struct.anon = type { void ()* }
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%struct.one_atexit_routine = type { %struct.anon, i32, i8* }
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@__dso_handle = external global { } ; <{ }*> [#uses=1]
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define hidden i32 @atexit(void ()* %func) nounwind {
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entry:
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; CHECK-LABEL: atexit:
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; CHECK-PIC: add r0, pc
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; CHECK-NOMOVT: ldr r[[REGNUM:[0-9]+]], LCPI0_0
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; CHECK-NOMOVT: LPC0_0:
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; CHECK-NOMOVT: add r[[REGNUM]], pc
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; CHECK-NOMOVT: ldr r1, [r[[REGNUM]]
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; CHECK-NOMOVT: blx _atexit_common
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; CHECK-NOMOVT: LCPI0_0:
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; CHECK-NOMOVT: .long L___dso_handle$non_lazy_ptr-(LPC0_0+4)
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%r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3]
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%0 = getelementptr %struct.one_atexit_routine, %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; <void ()**> [#uses=1]
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store void ()* %func, void ()** %0, align 4
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%1 = getelementptr %struct.one_atexit_routine, %struct.one_atexit_routine* %r, i32 0, i32 1 ; <i32*> [#uses=1]
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store i32 0, i32* %1, align 4
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%2 = call i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; <i32> [#uses=1]
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ret i32 %2
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}
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declare i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind
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