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e5c4e28d9c
The DetectDeadLanes pass performs a dataflow analysis of used/defined subregister lanes across COPY instructions and instructions that will get lowered to copies. It detects dead definitions and uses reading undefined values which are obscured by COPY and subregister usage. These dead definitions cause trouble in the register coalescer which cannot deal with definitions suddenly becoming dead after coalescing COPY instructions. For now the pass only adds dead and undef flags to machine operands. It should be possible to extend it in the future to remove the dead instructions and redo the analysis for the affected virtual registers. Differential Revision: http://reviews.llvm.org/D18427 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267851 91177308-0d34-0410-b5e6-96231b3b80d8
147 lines
3.3 KiB
CMake
147 lines
3.3 KiB
CMake
add_llvm_library(LLVMCodeGen
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AggressiveAntiDepBreaker.cpp
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AllocationOrder.cpp
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Analysis.cpp
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AtomicExpandPass.cpp
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BasicTargetTransformInfo.cpp
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BranchFolding.cpp
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BuiltinGCs.cpp
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CalcSpillWeights.cpp
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CallingConvLower.cpp
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CodeGen.cpp
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CodeGenPrepare.cpp
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CriticalAntiDepBreaker.cpp
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DeadMachineInstructionElim.cpp
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DetectDeadLanes.cpp
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DFAPacketizer.cpp
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DwarfEHPrepare.cpp
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EarlyIfConversion.cpp
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EdgeBundles.cpp
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ExecutionDepsFix.cpp
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ExpandISelPseudos.cpp
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ExpandPostRAPseudos.cpp
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FaultMaps.cpp
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FuncletLayout.cpp
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GCMetadata.cpp
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GCMetadataPrinter.cpp
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GCRootLowering.cpp
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GCStrategy.cpp
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GlobalMerge.cpp
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IfConversion.cpp
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ImplicitNullChecks.cpp
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InlineSpiller.cpp
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InterferenceCache.cpp
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InterleavedAccessPass.cpp
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IntrinsicLowering.cpp
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LatencyPriorityQueue.cpp
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LexicalScopes.cpp
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LiveDebugValues.cpp
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LiveDebugVariables.cpp
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LiveIntervalAnalysis.cpp
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LiveInterval.cpp
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LiveIntervalUnion.cpp
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LivePhysRegs.cpp
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LiveRangeCalc.cpp
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LiveRangeEdit.cpp
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LiveRegMatrix.cpp
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LiveStackAnalysis.cpp
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LiveVariables.cpp
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LLVMTargetMachine.cpp
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LocalStackSlotAllocation.cpp
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LowerEmuTLS.cpp
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MachineBasicBlock.cpp
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MachineBlockFrequencyInfo.cpp
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MachineBlockPlacement.cpp
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MachineBranchProbabilityInfo.cpp
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MachineCombiner.cpp
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MachineCopyPropagation.cpp
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MachineCSE.cpp
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MachineDominanceFrontier.cpp
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MachineDominators.cpp
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MachineFunctionAnalysis.cpp
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MachineFunction.cpp
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MachineFunctionPass.cpp
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MachineFunctionPrinterPass.cpp
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MachineInstrBundle.cpp
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MachineInstr.cpp
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MachineLICM.cpp
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MachineLoopInfo.cpp
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
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MachinePassRegistry.cpp
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MachinePostDominators.cpp
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MachineRegionInfo.cpp
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MachineRegisterInfo.cpp
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MachineScheduler.cpp
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MachineSink.cpp
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MachineSSAUpdater.cpp
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MachineTraceMetrics.cpp
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MachineVerifier.cpp
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PatchableFunction.cpp
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MIRPrinter.cpp
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MIRPrintingPass.cpp
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OptimizePHIs.cpp
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ParallelCG.cpp
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Passes.cpp
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PeepholeOptimizer.cpp
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PHIElimination.cpp
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PHIEliminationUtils.cpp
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PostRAHazardRecognizer.cpp
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PostRASchedulerList.cpp
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PreISelIntrinsicLowering.cpp
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ProcessImplicitDefs.cpp
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PrologEpilogInserter.cpp
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PseudoSourceValue.cpp
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RegAllocBase.cpp
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RegAllocBasic.cpp
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RegAllocFast.cpp
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RegAllocGreedy.cpp
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RegAllocPBQP.cpp
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RegisterClassInfo.cpp
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RegisterCoalescer.cpp
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RegisterPressure.cpp
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RegisterScavenging.cpp
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SafeStack.cpp
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ScheduleDAG.cpp
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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ShadowStackGCLowering.cpp
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ShrinkWrap.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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SpillPlacement.cpp
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SplitKit.cpp
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StackColoring.cpp
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StackMapLivenessAnalysis.cpp
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StackMaps.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
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TailDuplication.cpp
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TailDuplicator.cpp
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TargetFrameLoweringImpl.cpp
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TargetInstrInfo.cpp
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TargetLoweringBase.cpp
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TargetLoweringObjectFileImpl.cpp
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TargetOptionsImpl.cpp
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TargetRegisterInfo.cpp
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TargetSchedule.cpp
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TwoAddressInstructionPass.cpp
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UnreachableBlockElim.cpp
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VirtRegMap.cpp
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WinEHPrepare.cpp
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ADDITIONAL_HEADER_DIRS
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${LLVM_MAIN_INCLUDE_DIR}/llvm/CodeGen
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${LLVM_MAIN_INCLUDE_DIR}/llvm/CodeGen/PBQP
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LINK_LIBS ${PTHREAD_LIB}
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)
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add_dependencies(LLVMCodeGen intrinsics_gen)
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add_subdirectory(SelectionDAG)
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add_subdirectory(AsmPrinter)
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add_subdirectory(MIRParser)
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add_subdirectory(GlobalISel)
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