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881e3cca66
Currently there is no instruction encoding info and XCoreDisassembler::getInstruction() always returns Fail. I intend to add instruction encodings and tests in follow on commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170292 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
975 B
Plaintext
34 lines
975 B
Plaintext
;===- ./lib/Target/XCore/LLVMBuild.txt -------------------------*- Conf -*--===;
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;
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; The LLVM Compiler Infrastructure
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;
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; This file is distributed under the University of Illinois Open Source
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; License. See LICENSE.TXT for details.
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;
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;===------------------------------------------------------------------------===;
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;
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; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
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;
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; http://llvm.org/docs/LLVMBuild.html
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;
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;===------------------------------------------------------------------------===;
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[common]
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subdirectories = Disassembler InstPrinter MCTargetDesc TargetInfo
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[component_0]
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type = TargetGroup
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name = XCore
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parent = Target
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has_asmprinter = 1
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has_disassembler = 1
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[component_1]
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type = Library
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name = XCoreCodeGen
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parent = XCore
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required_libraries = AsmPrinter CodeGen Core MC SelectionDAG Support Target XCoreDesc XCoreInfo
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add_to_library_groups = XCore
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