Misha Brukman 91aee47a1b Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed. ...

Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.

This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6375 91177308-0d34-0410-b5e6-96231b3b80d8

2003-05-27 22:37:00 +00:00

..

Analysis

Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()

2003-05-27 00:06:48 +00:00

Archive

Fixed 'prevalent'.

2003-04-23 02:59:05 +00:00

AsmParser

Fix bugs:

2003-05-21 17:48:56 +00:00

Bytecode

Fix bug: Assembler/2003-05-03-BytecodeReaderProblem.llx

2003-05-22 18:35:38 +00:00

CodeGen

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

ExecutionEngine

Link in Sparc libs for the JIT, even on X86 to be able to support debugging

2003-05-27 21:42:05 +00:00

Linker

Fix Bug: Linker/2003-05-15-TypeProblem.ll

2003-05-15 16:30:55 +00:00

Support

Make _sure_ we don't go into an infinite loop if a signal happens!

2003-05-27 16:25:04 +00:00

Target

Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.

2003-05-27 22:37:00 +00:00

Transforms

Fix bug: Instcombine/2003-05-27-ConstExprCrash.ll

2003-05-27 16:40:51 +00:00

VMCore

Fix constant folding to ALWAYS work.

2003-05-27 19:16:07 +00:00

Makefile

Compile sub-directories in parallel, because they don't have interdependencies

2002-09-18 03:25:58 +00:00