Zoran Jovanovic 938cba6ae3 [mips][microMIPSr6] Change disassembler tests to one line format ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239519 91177308-0d34-0410-b5e6-96231b3b80d8

2015-06-11 09:42:10 +00:00

..

AArch64

[AArch64] AsmParser should be case insensitive about accepting vector register names.

2015-06-08 21:32:16 +00:00

ARM

[ARM] Add support for -sp- FPUs and FPU none to TargetParser

2015-06-05 13:31:19 +00:00

AsmParser

Teaching llvm-mc how to understand the defsym command line option. This allows integer-constant symbols to be defined on the command line and used during assembly.

2015-06-07 01:46:24 +00:00

COFF

Revise test to run llc and llvm-mc separately.

2015-05-28 21:49:50 +00:00

Disassembler

[mips][microMIPSr6] Change disassembler tests to one line format

2015-06-11 09:42:10 +00:00

ELF

Fix a regression in .pop_section.

2015-06-08 20:08:55 +00:00

Hexagon

[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.

2015-06-05 16:00:11 +00:00

MachO

MC: Remove obsolete MachO UseAggressiveSymbolFolding.

2015-06-04 20:27:42 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

Recommit "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).

2015-06-09 13:33:26 +00:00

PowerPC

LLVM support for vector quad bit permute and gather instructions through builtins

2015-06-11 06:21:25 +00:00

R600

R600/SI: Add assembler support for all CI and VI VOP2 instructions

2015-05-26 15:55:52 +00:00

Sparc

Sparc: support the "set" synthetic instruction.

2015-05-18 16:43:33 +00:00

SystemZ

[SystemZ] Add z13 vector facility and MC support

2015-05-05 19:23:40 +00:00

X86

X86-MPX: Implemented encoding for MPX instructions.

2015-06-09 13:02:10 +00:00