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d706d030af
Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298444 91177308-0d34-0410-b5e6-96231b3b80d8
62 lines
2.7 KiB
LLVM
62 lines
2.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=bonaire -show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=CI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo --show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=VI -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 --show-mc-encoding < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -mtriple=amdgcn-unknown-amdhsa < %s -mattr=-flat-for-global | FileCheck -check-prefix=GCNHSA -check-prefix=CIHSA -check-prefix=ALL %s
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; RUN: llc -march=amdgcn -mcpu=carrizo -mtriple=amdgcn-unknown-amdhsa -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCNHSA -check-prefix=VIHSA -check-prefix=ALL %s
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; FIXME: align on alloca seems to be ignored for private_segment_alignment
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; ALL-LABEL: {{^}}large_alloca_compute_shader:
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD0
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
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; GCN-DAG: ; fixup A - offset: 4, value: SCRATCH_RSRC_DWORD1
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; GCN-DAG: s_mov_b32 s{{[0-9]+}}, -1
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; CI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe8f000
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; VI-DAG: s_mov_b32 s{{[0-9]+}}, 0xe80000
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; GFX9-DAG: s_mov_b32 s{{[0-9]+}}, 0xe00000
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; GCNHSA: .amd_kernel_code_t
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; GCNHSA: enable_sgpr_private_segment_wave_byte_offset = 1
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; GCNHSA: user_sgpr_count = 8
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; GCNHSA: enable_sgpr_workgroup_id_x = 1
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; GCNHSA: enable_sgpr_workgroup_id_y = 0
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; GCNHSA: enable_sgpr_workgroup_id_z = 0
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; GCNHSA: enable_sgpr_workgroup_info = 0
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; GCNHSA: enable_vgpr_workitem_id = 0
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; GCNHSA: enable_sgpr_private_segment_buffer = 1
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; GCNHSA: enable_sgpr_dispatch_ptr = 0
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; GCNHSA: enable_sgpr_queue_ptr = 0
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; GCNHSA: enable_sgpr_kernarg_segment_ptr = 1
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; GCNHSA: enable_sgpr_dispatch_id = 0
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; GCNHSA: enable_sgpr_flat_scratch_init = 1
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; GCNHSA: enable_sgpr_private_segment_size = 0
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; GCNHSA: enable_sgpr_grid_workgroup_count_x = 0
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; GCNHSA: enable_sgpr_grid_workgroup_count_y = 0
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; GCNHSA: enable_sgpr_grid_workgroup_count_z = 0
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; GCNHSA: workitem_private_segment_byte_size = 32772
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; GCNHSA: private_segment_alignment = 4
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; GCNHSA: .end_amd_kernel_code_t
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; GCNHSA: buffer_store_dword {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], s9 offen
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; GCNHSA: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, s[0:3], s9 offen
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; Scratch size = alloca size + emergency stack slot
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; ALL: ; ScratchSize: 32772
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define amdgpu_kernel void @large_alloca_compute_shader(i32 %x, i32 %y) #0 {
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%large = alloca [8192 x i32], align 4
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%gep = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 8191
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store volatile i32 %x, i32* %gep
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%gep1 = getelementptr [8192 x i32], [8192 x i32]* %large, i32 0, i32 %y
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%val = load volatile i32, i32* %gep1
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store volatile i32 %val, i32 addrspace(1)* undef
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ret void
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}
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attributes #0 = { nounwind }
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