Chris Lattner ed83a7019b Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom ...

part was always forced to be sextload, even when we needed an zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30782 91177308-0d34-0410-b5e6-96231b3b80d8

2006-10-07 00:58:36 +00:00

..

SelectionDAG

Fix a bug legalizing zero-extending i64 loads into 32-bit loads. The bottom

2006-10-07 00:58:36 +00:00

AsmPrinter.cpp

If a target uses a GOT, put it in the jt data section, not the text

2006-10-06 22:50:56 +00:00

BranchFolding.cpp

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DwarfWriter.cpp

More long term solution

2006-10-04 10:40:15 +00:00

ELFWriter.cpp

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IntrinsicLowering.cpp

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LiveInterval.cpp

When joining two intervals where the RHS is really simple, use a light-weight

2006-09-02 05:26:59 +00:00

LiveIntervalAnalysis.cpp

Keep track of the start of MBB's in a separate map from instructions. This

2006-09-15 03:57:23 +00:00

LiveVariables.cpp

Fix for PR929. The PHI nodes were being gone through for each instruction

2006-10-03 07:20:20 +00:00

LLVMTargetMachine.cpp

add setJumpBufSize() and setJumpBufAlignment() to target-lowering.

2006-09-04 06:21:35 +00:00

MachineBasicBlock.cpp

print labels even if a MBB doesn't have a corresponding LLVM BB, just don't

2006-10-06 21:28:17 +00:00

MachineDebugInfo.cpp

Adding C++ member support.

2006-08-21 21:20:18 +00:00

MachineFunction.cpp

Bugfixes

2006-10-03 20:19:23 +00:00

MachineInstr.cpp

Only call isUse/isDef on register operands

2006-09-05 20:19:27 +00:00

MachinePassRegistry.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

MachOWriter.cpp

Behold, more work on relocations. Things are looking pretty good now.

2006-09-10 23:03:44 +00:00

Makefile

Fix linking on Alpha

2006-07-20 17:27:58 +00:00

Passes.cpp

Work around a bug in gcc 3.3.5, reported by a user

2006-08-03 00:16:56 +00:00

PHIElimination.cpp

"Once more into the breach, dear friends, once more, or fill the wall up

2006-09-28 07:10:24 +00:00

PhysRegTracker.h

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PrologEpilogInserter.cpp

TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.

2006-09-28 18:52:32 +00:00

RegAllocLinearScan.cpp

s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|

2006-08-27 12:54:02 +00:00

RegAllocLocal.cpp

Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not

2006-09-19 18:02:01 +00:00

RegAllocSimple.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

TwoAddressInstructionPass.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

UnreachableBlockElim.cpp

eliminate RegisterOpt. It does the same thing as RegisterPass.

2006-08-27 22:42:52 +00:00

VirtRegMap.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

VirtRegMap.h

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00