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llvm/lib/Target/AMDGPU
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Matt Arsenault 96d418302e AMDGPU: Fix adding redundant m0 uses 
BuildMI already adds these since they are defined correctly now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250961 91177308-0d34-0410-b5e6-96231b3b80d8
2015-10-21 22:37:51 +00:00
..
AsmParser
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-06 15:57:53 +00:00
InstPrinter
Untabify.
2015-09-22 11:15:07 +00:00
MCTargetDesc
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
TargetInfo
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Utils
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPU.h
…
AMDGPU.td
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAsmPrinter.cpp
AMDGPU: Merge if and switch
2015-10-01 21:51:59 +00:00
AMDGPUAsmPrinter.h
…
AMDGPUCallingConv.td
…
AMDGPUDiagnosticInfoUnsupported.cpp
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUDiagnosticInfoUnsupported.h
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUHSATargetObjectFile.cpp
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUHSATargetObjectFile.h
AMDGPU: address -Winconsistent-missing-override
2015-09-26 04:34:52 +00:00
AMDGPUInstrInfo.cpp
Make a bunch of static arrays const.
2015-10-18 05:15:34 +00:00
AMDGPUInstrInfo.h
AMDGPU: Make getNamedOperandIdx declaration readonly
2015-09-25 18:09:15 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
AMDGPU: Handle i64->v2i32 loads/stores in PreprocessISelDAG
2015-09-25 17:27:08 +00:00
AMDGPUISelLowering.cpp
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
AMDGPUISelLowering.h
DAGCombiner: Combine extract_vector_elt from build_vector
2015-10-12 23:59:50 +00:00
AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDGPUMCInstLower.h
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AMDGPUOpenCLImageTypeLoweringPass.cpp
AMDGPU/SI: Remove assert from AMDGPUOpenCLImageTypeLowering pass
2015-10-01 21:16:05 +00:00
AMDGPUPromoteAlloca.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
2015-09-15 16:17:27 +00:00
AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
AMDGPU: Register some more passes so -print-before works
2015-10-12 17:43:59 +00:00
AMDGPUTargetMachine.h
AMDGPU/SI: Use .hsatext section instead of .text for HSA
2015-09-25 21:41:28 +00:00
AMDGPUTargetTransformInfo.cpp
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AMDGPUTargetTransformInfo.h
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AMDILCFGStructurizer.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
AMDKernelCodeT.h
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CaymanInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
CIInstructions.td
AMDGPU: Add s_dcache_* instructions
2015-09-24 19:52:27 +00:00
CMakeLists.txt
AMDGPU: Split DiagnosticInfoUnsupported into its own file
2015-10-21 22:37:46 +00:00
EvergreenInstructions.td
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
LLVMBuild.txt
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Makefile
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Processors.td
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
R600Defines.h
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R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600InstrInfo.h
Pass BranchProbability/BlockMass by value instead of const& as they are small. NFC.
2015-09-10 23:10:42 +00:00
R600Instructions.td
Fix typos.
2015-09-12 01:17:08 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
AMDGPU: Add MEM_RAT STORE_TYPED.
2015-10-01 17:51:34 +00:00
R600ISelLowering.h
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R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
R600Packetizer.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
R600RegisterInfo.cpp
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R600RegisterInfo.h
AMDGPU: Remove dead code
2015-09-19 06:41:10 +00:00
R600RegisterInfo.td
…
R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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SIAnnotateControlFlow.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
SIDefines.h
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-06 15:57:53 +00:00
SIFixControlFlowLiveIntervals.cpp
AMDGPU: Remove unused includes
2015-09-25 00:28:43 +00:00
SIFixSGPRCopies.cpp
AMDGPU: Refactor isVGPRToSGPRCopy
2015-10-13 00:07:54 +00:00
SIFixSGPRLiveRanges.cpp
AMDGPU: Remove implicit ilist iterator conversions, NFC
2015-10-13 20:07:10 +00:00
SIFoldOperands.cpp
AMDGPU: Fix verifier error in SIFoldOperands
2015-10-21 22:37:50 +00:00
SIInsertWaits.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SIInstrFormats.td
AMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-06 15:57:53 +00:00
SIInstrInfo.cpp
AMDGPU: Simplify VOP3 operand legalization.
2015-10-21 21:51:02 +00:00
SIInstrInfo.h
AMDGPU: Simplify VOP3 operand legalization.
2015-10-21 21:51:02 +00:00
SIInstrInfo.td
AMDGPU: Add comment for VOP2b operand class
2015-10-07 01:36:00 +00:00
SIInstructions.td
AMDGPU: Fix missing implicit m0 uses on movrel instructions
2015-10-07 17:46:32 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
AMDGPU: Simplify VOP3 operand legalization.
2015-10-21 21:51:02 +00:00
SIISelLowering.h
…
SILoadStoreOptimizer.cpp
…
SILowerControlFlow.cpp
AMDGPU: Fix adding redundant m0 uses
2015-10-21 22:37:51 +00:00
SILowerI1Copies.cpp
AMDGPU: Fix recomputing dominator tree unnecessarily
2015-09-25 17:21:28 +00:00
SIMachineFunctionInfo.cpp
…
SIMachineFunctionInfo.h
…
SIPrepareScratchRegs.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SIRegisterInfo.cpp
AMDGPU: Stop reserving v[254:255]
2015-10-20 03:59:58 +00:00
SIRegisterInfo.h
AMDGPU/SI: Re-order PreloadedValue enum and number entries based on init order
2015-10-01 02:02:46 +00:00
SIRegisterInfo.td
AMDGPU: Set CopyCost of register classes
2015-09-26 04:09:34 +00:00
SISchedule.td
AMDGPU: Improve accuracy of instruction rates for VOPC
2015-09-25 16:58:25 +00:00
SIShrinkInstructions.cpp
AMDGPU: Add MachineInstr overloads for instruction format tests
2015-10-20 04:35:43 +00:00
SITypeRewriter.cpp
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VIInstrFormats.td
…
VIInstructions.td
AMDGPU: Add s_dcache_* instructions
2015-09-24 19:52:27 +00:00