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0f320a4f3b
Summary: N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own ($). This fixes the majority of object differences between -fintegrated-as and -fno-integrated-as. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D22412 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275967 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
2.5 KiB
LLVM
71 lines
2.5 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s -check-prefixes=ALL,FCC
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; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s -check-prefixes=ALL,FCC
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; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s -check-prefixes=ALL,GPR,32-GPR
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; RUN: llc -march=mips64 -mcpu=mips4 < %s | FileCheck %s -check-prefixes=ALL,FCC
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; RUN: llc -march=mips64 -mcpu=mips64 < %s | FileCheck %s -check-prefixes=ALL,FCC
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; RUN: llc -march=mips64 -mcpu=mips64r2 < %s | FileCheck %s -check-prefixes=ALL,FCC
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; RUN: llc -march=mips64 -mcpu=mips64r6 < %s | FileCheck %s -check-prefixes=ALL,GPR,64-GPR
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define double @foo(double %a, double %b) nounwind readnone {
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entry:
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; ALL-LABEL: foo:
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; FCC: bc1f {{\$|\.L}}BB
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; FCC: nop
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; 32-GPR: mtc1 $zero, $[[Z:f[0-9]]]
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; 32-GPR: mthc1 $zero, $[[Z:f[0-9]]]
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; 64-GPR: dmtc1 $zero, $[[Z:f[0-9]]]
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; GPR: cmp.lt.d $[[FGRCC:f[0-9]+]], $[[Z]], $f12
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; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC]]
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; GPR-NOT: not $[[GPRCC]], $[[GPRCC]]
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; GPR: bnezc $[[GPRCC]], {{\$|\.L}}BB
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%cmp = fcmp ogt double %a, 0.000000e+00
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br i1 %cmp, label %if.end6, label %if.else
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if.else: ; preds = %entry
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%cmp3 = fcmp ogt double %b, 0.000000e+00
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br i1 %cmp3, label %if.end6, label %return
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if.end6: ; preds = %if.else, %entry
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%c.0 = phi double [ %a, %entry ], [ 0.000000e+00, %if.else ]
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%sub = fsub double %b, %c.0
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%mul = fmul double %sub, 2.000000e+00
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br label %return
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return: ; preds = %if.else, %if.end6
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%retval.0 = phi double [ %mul, %if.end6 ], [ 0.000000e+00, %if.else ]
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ret double %retval.0
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}
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define void @f1(float %f) nounwind {
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entry:
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; ALL-LABEL: f1:
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; FCC: bc1f {{\$|\.L}}BB
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; FCC: nop
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; GPR: mtc1 $zero, $[[Z:f[0-9]]]
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; GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $[[Z]]
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; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC]]
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; GPR-NOT: not $[[GPRCC]], $[[GPRCC]]
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; 64-GPR beqzc $[[GPRCC]], $BB
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; 32-GPR beqz $[[GPRCC]], $BB
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%cmp = fcmp une float %f, 0.000000e+00
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @abort() noreturn
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unreachable
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if.end: ; preds = %entry
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tail call void (...) @f2() nounwind
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ret void
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}
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declare void @abort() noreturn nounwind
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declare void @f2(...)
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