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When SelectionDAGISel transforms a node representing an inline asm block, memory constraint information is not preserved. This can cause constraints to be broken when a memory offset is of the form: offset + frame index when the frame is resolved. By propagating the constraints all the way to the backend, targets can enforce memory operands of inline assembly to conform to their constraints. For MIPSR6, some instructions had their offsets reduced to 9 bits from 16 bits such as ll/sc. This becomes problematic when using inline assembly to perform atomic operations, as an offset can generated that is too big to encode in the instruction. Reviewers: dsanders, vkalintris Differential Review: https://reviews.llvm.org/D21615 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275786 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.3 KiB
LLVM
37 lines
1.3 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s --check-prefixes=ALL,R6
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; RUN: llc -march=mips -mcpu=mips64r6 -target-abi=n64 < %s | FileCheck %s --check-prefixes=ALL,R6
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; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,PRER6
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; RUN: llc -march=mips -mcpu=mips64 -target-abi=n64 < %s | FileCheck %s --check-prefixes=ALL,PRER6
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%struct.anon = type { [63 x i32], i32, i32 }
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define i32 @Atomic() {
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; CHECK-LABEL: Atomic:
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entry:
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%s = alloca %struct.anon, align 4
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%0 = bitcast %struct.anon* %s to i8*
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%count = getelementptr inbounds %struct.anon, %struct.anon* %s, i64 0, i32 1
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store i32 0, i32* %count, align 4
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; R6: addiu $[[R0:[0-9a-z]+]], $sp, {{[0-9]+}}
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; ALL: #APP
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; R6: ll ${{[0-9a-z]+}}, 0($[[R0]])
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; R6: sc ${{[0-9a-z]+}}, 0($[[R0]])
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; PRER6: ll ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}})
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; PRER6: sc ${{[0-9a-z]+}}, {{[0-9]+}}(${{[0-9a-z]+}})
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; ALL: #NO_APP
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%1 = call { i32, i32 } asm sideeffect ".set push\0A.set noreorder\0A1:\0All $0, $2\0Aaddu $1, $0, $3\0Asc $1, $2\0Abeqz $1, 1b\0Aaddu $1, $0, $3\0A.set pop\0A", "=&r,=&r,=*^ZC,Ir,*^ZC,~{memory},~{$1}"(i32* %count, i32 10, i32* %count)
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%asmresult1.i = extractvalue { i32, i32 } %1, 1
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%cmp = icmp ne i32 %asmresult1.i, 10
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%conv = zext i1 %cmp to i32
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%call2 = call i32 @f(i32 signext %conv)
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ret i32 %call2
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}
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declare i32 @f(i32 signext)
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