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fbff6d5f71
Disable tail calls while the remaining bugs are fixed. Enable only for tests. Reviewers: vkalintiris Differential Review: https://reviews.llvm.org/D24912 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@282487 91177308-0d34-0410-b5e6-96231b3b80d8
231 lines
8.2 KiB
LLVM
231 lines
8.2 KiB
LLVM
; Test the 'call' instruction and the tailcall variant.
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; RUN: llc -march=mips -mcpu=mips32 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r2 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r3 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,R6C
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; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,R6C
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; RUN: llc -march=mips64 -mcpu=mips4 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r2 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r3 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r5 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r6 -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,R6C
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; RUN: llc -march=mips -mcpu=mips32 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r2 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r3 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
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; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=R6C
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; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=R6C
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; RUN: llc -march=mips64 -mcpu=mips4 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r2 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r3 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r5 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
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; RUN: llc -march=mips64 -mcpu=mips64r6 -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=R6C
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declare void @extern_void_void()
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declare i32 @extern_i32_void()
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declare float @extern_float_void()
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define i32 @call_void_void() {
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; ALL-LABEL: call_void_void:
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
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; NOT-R6C: jalr $[[TGT]]
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; R6C: jalrc $[[TGT]]
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call void @extern_void_void()
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; R6C: jrc $ra
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ret i32 0
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}
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define i32 @call_i32_void() {
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; ALL-LABEL: call_i32_void:
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
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; NOT-R6C: jalr $[[TGT]]
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; R6C: jalrc $[[TGT]]
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%1 = call i32 @extern_i32_void()
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%2 = add i32 %1, 1
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; R6C: jrc $ra
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ret i32 %2
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}
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define float @call_float_void() {
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; ALL-LABEL: call_float_void:
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; FIXME: Not sure why we don't use $gp directly on such a simple test. We should
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; look into it at some point.
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; O32: addu $[[GP:[0-9]+]], ${{[0-9]+}}, $25
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_float_void)($[[GP]])
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_float_void)($gp)
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; NOT-R6C: jalr $[[TGT]]
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; R6C: jalrc $[[TGT]]
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%1 = call float @extern_float_void()
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%2 = fadd float %1, 1.0
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; R6C: jrc $ra
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ret float %2
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}
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define void @musttail_call_void_void() {
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; ALL-LABEL: musttail_call_void_void:
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_void_void)($gp)
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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musttail call void @extern_void_void()
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ret void
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}
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define i32 @musttail_call_i32_void() {
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; ALL-LABEL: musttail_call_i32_void:
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_i32_void)($gp)
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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%1 = musttail call i32 @extern_i32_void()
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ret i32 %1
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}
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define float @musttail_call_float_void() {
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; ALL-LABEL: musttail_call_float_void:
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; O32: lw $[[TGT:[0-9]+]], %call16(extern_float_void)($gp)
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; N64: ld $[[TGT:[0-9]+]], %call16(extern_float_void)($gp)
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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%1 = musttail call float @extern_float_void()
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ret float %1
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}
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define i32 @indirect_call_void_void(void ()* %addr) {
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; ALL-LABEL: indirect_call_void_void:
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; ALL: move $25, $4
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; NOT-R6C: jalr $25
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; R6C: jalrc $25
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call void %addr()
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; R6C: jrc $ra
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ret i32 0
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}
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define i32 @indirect_call_i32_void(i32 ()* %addr) {
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; ALL-LABEL: indirect_call_i32_void:
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; ALL: move $25, $4
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; NOT-R6C: jalr $25
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; R6C: jalrc $25
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%1 = call i32 %addr()
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%2 = add i32 %1, 1
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; R6C: jrc $ra
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ret i32 %2
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}
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define float @indirect_call_float_void(float ()* %addr) {
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; ALL-LABEL: indirect_call_float_void:
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; ALL: move $25, $4
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; NOT-R6C: jalr $25
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; R6C: jalrc $25
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%1 = call float %addr()
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%2 = fadd float %1, 1.0
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; R6C: jrc $ra
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ret float %2
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}
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; We can't use 'musttail' here because the verifier is too conservative and
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; prohibits any prototype difference.
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define void @tail_indirect_call_void_void(void ()* %addr) {
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; ALL-LABEL: tail_indirect_call_void_void:
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; ALL: move $25, $4
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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tail call void %addr()
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ret void
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}
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define i32 @tail_indirect_call_i32_void(i32 ()* %addr) {
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; ALL-LABEL: tail_indirect_call_i32_void:
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; ALL: move $25, $4
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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%1 = tail call i32 %addr()
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ret i32 %1
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}
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define float @tail_indirect_call_float_void(float ()* %addr) {
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; ALL-LABEL: tail_indirect_call_float_void:
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; ALL: move $25, $4
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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%1 = tail call float %addr()
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ret float %1
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}
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; Check that passing undef as a double value doesn't cause machine code errors
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; for FP64.
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declare hidden void @undef_double(i32 %this, double %volume) unnamed_addr align 2
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define hidden void @thunk_undef_double(i32 %this, double %volume) unnamed_addr align 2 {
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; ALL-LABEL: thunk_undef_double:
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; O32: # implicit-def: %A2
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; O32: # implicit-def: %A3
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; NOT-R6C: jr $[[TGT]]
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; R6C: jrc $[[TGT]]
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tail call void @undef_double(i32 undef, double undef) #8
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ret void
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}
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; Check that immediate addresses do not use jal.
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define i32 @jal_only_allows_symbols() {
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; ALL-LABEL: jal_only_allows_symbols:
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; ALL-NOT: {{jal }}
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; ALL: addiu $[[TGT:[0-9]+]], $zero, 1234
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; ALL-NOT: {{jal }}
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; NOT-R6C: jalr $[[TGT]]
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; R6C: jalrc $[[TGT]]
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; ALL-NOT: {{jal }}
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call void () inttoptr (i32 1234 to void ()*)()
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; R6C: jrc $ra
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ret i32 0
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}
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