mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-13 06:38:44 +00:00
ed541fe200
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250407 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
624 B
LLVM
20 lines
624 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
|
|
|
|
@i = global i32 10, align 4
|
|
@j = global i32 4, align 4
|
|
@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
|
|
|
|
define i32 @main() nounwind {
|
|
entry:
|
|
%0 = load i32, i32* @i, align 4
|
|
%1 = load i32, i32* @j, align 4
|
|
%shl = shl i32 %0, %1
|
|
; 16: sllv ${{[0-9]+}}, ${{[0-9]+}}
|
|
store i32 %shl, i32* @i, align 4
|
|
%2 = load i32, i32* @j, align 4
|
|
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i32 0, i32 0), i32 %2)
|
|
ret i32 0
|
|
}
|
|
|
|
declare i32 @printf(i8*, ...)
|