llvm/test/CodeGen/SPARC
Matthias Braun ee5205bfae ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps()
addSchedBarrierDeps() is supposed to add use operands to the ExitSU
node. The current implementation adds uses for calls/barrier instruction
and the MBB live-outs in all other cases. The use
operands of conditional jump instructions were missed.

Also added code to macrofusion to set the latencies between nodes to
zero to avoid problems with the fusing nodes lingering around in the
pending list now.

Differential Revision: https://reviews.llvm.org/D25140

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286544 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-11 01:34:21 +00:00
..
32abi.ll
64abi.ll
64bit.ll
64cond.ll
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll
2011-01-11-CC.ll
2011-01-11-FrameAddr.ll
2011-01-19-DelaySlot.ll ScheduleDAGInstrs: Add condjump deps to addSchedBarrierDeps() 2016-11-11 01:34:21 +00:00
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll [Sparc] Don't overlap variable-sized allocas with other stack variables. 2016-10-25 22:13:28 +00:00
analyze-branch.ll
atomics.ll
basictest.ll
blockaddr.ll
constpool.ll
ctpop.ll
DbgValueOtherTargets.test
empty-functions.ll
exception.ll
fail-alloca-align.ll [Sparc] Don't overlap variable-sized allocas with other stack variables. 2016-10-25 22:13:28 +00:00
float-constants.ll
float.ll
fp128.ll
func-addr.ll
globals.ll
inlineasm.ll
leafproc.ll
LeonCASAInstructionUT.ll
LeonDetectRoundChangePassUT.ll Sparc: fix test. 2016-10-19 15:55:11 +00:00
LeonFixAllFDIVSQRTPassUT.ll [Sparc][LEON] Test for FixFDIVSQRT erratum fix. 2016-11-01 14:23:37 +00:00
LeonInsertNOPLoadPassUT.ll
LeonItinerariesUT.ll
LeonReplaceFMULSPassUT.ll
LeonReplaceSDIVPassUT.ll This pass, fixing an erratum in some LEON 2 processors ensures that the SDIV instruction is not issued, but replaced by SDIVcc instead, which does not exhibit the error. Unit test included. 2016-10-10 08:53:06 +00:00
LeonSMACUMACInstructionUT.ll
lit.local.cfg
mature-mc-support.ll
missing-sret.ll
missinglabel.ll
mult-alt-generic-sparc.ll
multiple-div.ll
obj-relocs.ll
parts.ll
private.ll
rem.ll
reserved-regs.ll
select-mask.ll
setjmp.ll
sjlj.ll
soft-float.ll
spill.ll
spillsize.ll
sret-secondary.ll
stack-align.ll [Sparc] Don't overlap variable-sized allocas with other stack variables. 2016-10-25 22:13:28 +00:00
stack-protector.ll
thread-pointer.ll
tls.ll
trap.ll
varargs.ll
vector-call.ll
vector-extract-elt.ll
zerostructcall.ll