Simon Pilgrim 9226f72364 [X86][LWP] Add llvm support for LWP instructions (reapplied). ...

This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Reapplied - this time without changing line endings of existing files.

Differential Revision: https://reviews.llvm.org/D32769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302041 91177308-0d34-0410-b5e6-96231b3b80d8

2017-05-03 15:51:39 +00:00

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AlignedBundling

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3DNow.s

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2011-09-06-NoNewline.s

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abs8.s

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address-size.s

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avx512-encodings.s

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avx512-err.s

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avx512bw-encoding.s

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avx512ifma-encoding.s

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avx512ifmavl-encoding.s

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avx512vbmi-encoding.s

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avx512vl-encoding.s

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cfi_def_cfa-crash.s

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code16gcc.s

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compact-unwind.s

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data-prefix16.s

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data-prefix32.s

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data-prefix64.s

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data-prefix-fail.s

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encoder-fail.s

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error-reloc.s

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expand-var.s

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faultmap-section-parsing.s

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fde-reloc.s

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fixup-cpu-mode.s

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fp-setup-macho.s

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gnux32-dwarf-gen.s

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hex-immediates.s

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i386-darwin-frame-register.ll

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imm-comments.s

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index-operations.s

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inline-asm-obj.ll

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intel-syntax-2.s

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intel-syntax-ambiguous.s

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intel-syntax-avx512.s

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intel-syntax-bitwise-ops.s

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intel-syntax-directional-label.s

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intel-syntax-encoding.s

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intel-syntax-error.s

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intel-syntax-hex.s

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intel-syntax-invalid-basereg.s

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intel-syntax-invalid-scale.s

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intel-syntax-print.ll

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intel-syntax-ptr-sized.s

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intel-syntax-unsized-memory.s

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intel-syntax-x86-64-avx512f_vl.s

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intel-syntax-x86-64-avx.s

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intel-syntax-x86-avx512dq_vl.s

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intel-syntax-x86-avx512vbmi_vl.s

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intel-syntax.s

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invalid_opcode.s

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invalid-sleb.s

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large-bss.s

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line-table-sections.s

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lit.local.cfg

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lwp-x86_64.s

[X86][LWP] Add llvm support for LWP instructions (reapplied).

2017-05-03 15:51:39 +00:00

lwp.s

[X86][LWP] Add llvm support for LWP instructions (reapplied).

2017-05-03 15:51:39 +00:00

macho-reloc-errors-x86_64.s

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macho-reloc-errors-x86.s

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macho-uleb.s

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mpx-encodings.s

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no-elf-compact-unwind.s

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padlock.s

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pr22028.s

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pr27884.s

2 tests that were lost in rL301390

2017-04-27 10:20:35 +00:00

pr28547.s

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relax-insn.s

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reloc-bss.s

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reloc-directive.s

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reloc-macho.s

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reloc-undef-global.s

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ret.s

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sgx-encoding.s

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shuffle-comments.s

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stackmap-nops.ll

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validate-inst-att.s

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validate-inst-intel.s

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variant-diagnostics.s

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x86_64-avx-clmul-encoding.s

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x86_64-avx-encoding.s

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x86_64-bmi-encoding.s

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x86_64-encoding.s

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x86_64-fma3-encoding.s

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x86_64-fma4-encoding.s

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x86_64-hle-encoding.s

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x86_64-imm-widths.s

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x86_64-rand-encoding.s

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x86_64-rtm-encoding.s

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x86_64-signed-reloc.s

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x86_64-sse4a.s

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x86_64-tbm-encoding.s

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x86_64-xop-encoding.s

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x86_directives.s

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x86_errors.s

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x86_long_nop.s

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x86_nop.s

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x86_operands.s

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x86-16.s

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x86-32-avx.s

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x86-32-coverage.s

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x86-32-fma3.s

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x86-32-ms-inline-asm.s

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x86-32.s

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x86-64-avx512bw_vl.s

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x86-64-avx512bw.s

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x86-64-avx512cd_vl.s

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x86-64-avx512cd.s

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x86-64-avx512dq_vl.s

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x86-64-avx512dq.s

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x86-64-avx512f_vl.s

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x86-64.s

[X86][SSE2] Fix asm string for movq (Move Quadword) instruction.

2017-04-26 07:08:44 +00:00

x86-branch-relaxation.s

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x86-evenDirective.s

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x86-itanium.ll

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x86-target-directives.s

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x86-windows-itanium-libcalls.ll

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X86_64-pku.s

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