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d0dbe02fd2
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.
When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.
This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.
I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.
rdar://problem/16227836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
67 lines
3.8 KiB
LLVM
67 lines
3.8 KiB
LLVM
; RUN: llc -mcpu=cortex-a8 -mattr=-neonfp -arm-atomic-cfg-tidy=0 < %s | FileCheck %s
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; PR5423
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "armv7-eabi"
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define arm_aapcs_vfpcc void @foo() {
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entry:
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%0 = load float* null, align 4 ; <float> [#uses=2]
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%1 = fmul float %0, undef ; <float> [#uses=2]
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%2 = fmul float 0.000000e+00, %1 ; <float> [#uses=2]
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%3 = fmul float %0, %1 ; <float> [#uses=1]
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%4 = fadd float 0.000000e+00, %3 ; <float> [#uses=1]
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%5 = fsub float 1.000000e+00, %4 ; <float> [#uses=1]
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; CHECK-LABEL: foo:
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; CHECK: vmov.f32 s{{[0-9]+}}, #1.000000e+00
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%6 = fsub float 1.000000e+00, undef ; <float> [#uses=2]
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%7 = fsub float %2, undef ; <float> [#uses=1]
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%8 = fsub float 0.000000e+00, undef ; <float> [#uses=3]
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%9 = fadd float %2, undef ; <float> [#uses=3]
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%10 = load float* undef, align 8 ; <float> [#uses=3]
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%11 = fmul float %8, %10 ; <float> [#uses=1]
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%12 = fadd float undef, %11 ; <float> [#uses=2]
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%13 = fmul float undef, undef ; <float> [#uses=1]
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%14 = fmul float %6, 0.000000e+00 ; <float> [#uses=1]
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%15 = fadd float %13, %14 ; <float> [#uses=1]
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%16 = fmul float %9, %10 ; <float> [#uses=1]
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%17 = fadd float %15, %16 ; <float> [#uses=2]
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%18 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
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%19 = fadd float %18, 0.000000e+00 ; <float> [#uses=1]
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%20 = fmul float undef, %10 ; <float> [#uses=1]
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%21 = fadd float %19, %20 ; <float> [#uses=1]
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%22 = load float* undef, align 8 ; <float> [#uses=1]
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%23 = fmul float %5, %22 ; <float> [#uses=1]
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%24 = fadd float %23, undef ; <float> [#uses=1]
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%25 = load float* undef, align 8 ; <float> [#uses=2]
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%26 = fmul float %8, %25 ; <float> [#uses=1]
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%27 = fadd float %24, %26 ; <float> [#uses=1]
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%28 = fmul float %9, %25 ; <float> [#uses=1]
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%29 = fadd float undef, %28 ; <float> [#uses=1]
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%30 = fmul float %8, undef ; <float> [#uses=1]
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%31 = fadd float undef, %30 ; <float> [#uses=1]
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%32 = fmul float %6, undef ; <float> [#uses=1]
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%33 = fadd float undef, %32 ; <float> [#uses=1]
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%34 = fmul float %9, undef ; <float> [#uses=1]
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%35 = fadd float %33, %34 ; <float> [#uses=1]
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%36 = fmul float 0.000000e+00, undef ; <float> [#uses=1]
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%37 = fmul float %7, undef ; <float> [#uses=1]
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%38 = fadd float %36, %37 ; <float> [#uses=1]
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%39 = fmul float undef, undef ; <float> [#uses=1]
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%40 = fadd float %38, %39 ; <float> [#uses=1]
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store float %12, float* undef, align 8
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store float %17, float* undef, align 4
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store float %21, float* undef, align 8
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store float %27, float* undef, align 8
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store float %29, float* undef, align 4
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store float %31, float* undef, align 8
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store float %40, float* undef, align 8
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store float %12, float* null, align 8
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%41 = fmul float %17, undef ; <float> [#uses=1]
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%42 = fadd float %41, undef ; <float> [#uses=1]
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%43 = fmul float %35, undef ; <float> [#uses=1]
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%44 = fadd float %42, %43 ; <float> [#uses=1]
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store float %44, float* null, align 4
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unreachable
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}
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