Tom Stellard 1536863668 AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI ... Summary: These register has different encodings on CI and VI, so we add pseudo FLAT_SCRACTH registers to be used before MC, and subtarget specific registers to be used by the MC layer. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15661 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256178 91177308-0d34-0410-b5e6-96231b3b80d8		2015-12-21 18:44:27 +00:00
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AArch64	[AArch64] Fix FP16 vector instructions that should only accept low registers	2015-12-09 14:32:11 +00:00
AMDGPU	AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VI	2015-12-21 18:44:27 +00:00
ARM	Avoid explicit relocation sorting most of the time.	2015-12-17 16:22:06 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on non-arm64 darwin.	2015-11-11 00:51:36 +00:00
COFF	[MC, COFF] Unbreak support for COFF timestamps	2015-12-21 08:03:07 +00:00
Disassembler	[mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions	2015-12-21 13:08:58 +00:00
ELF	[X86] Add relaxtion logic for SBB instructions.	2015-12-15 00:09:23 +00:00
Hexagon	[Hexagon] Add PIC support	2015-12-18 20:19:30 +00:00
MachO	[MC] Add a test for state reset in MCMachOStreamer	2015-12-05 01:02:53 +00:00
Markup
Mips	[mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions	2015-12-21 13:08:58 +00:00
PowerPC	Relax a few more overspecified tests.	2015-11-03 19:38:19 +00:00
Sparc	Update test to take into account for r251271.	2015-10-26 03:34:29 +00:00
SystemZ	[SystemZ] Sort relocs to avoid code corruption by linker optimization	2015-12-16 18:12:40 +00:00
X86	I Added a triple flag for x86-evenDirective test.	2015-12-13 21:12:33 +00:00