mirror of
https://github.com/RPCSX/llvm.git
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eee0852878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59262 91177308-0d34-0410-b5e6-96231b3b80d8
621 lines
28 KiB
XML
621 lines
28 KiB
XML
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<Tool
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Name="VCCustomBuildTool"
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Description="Performing TableGen Step"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
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$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
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$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
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AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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/>
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<FileConfiguration
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Name="Debug|x64"
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<Tool
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Name="VCCustomBuildTool"
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Description="Performing TableGen Step"
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CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
|
|
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
|
|
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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|
/>
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|
</FileConfiguration>
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<FileConfiguration
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Name="Release|Win32"
|
|
>
|
|
<Tool
|
|
Name="VCCustomBuildTool"
|
|
Description="Performing TableGen Step"
|
|
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
|
|
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
|
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Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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/>
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</FileConfiguration>
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<FileConfiguration
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Name="Release|x64"
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>
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<Tool
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|
Name="VCCustomBuildTool"
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|
Description="Performing TableGen Step"
|
|
CommandLine="echo Building $(InputFileName) register names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterNames.inc
echo Building $(InputFileName) register information header with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc-header -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.h.inc
echo Building $(InputFileName) register information implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-register-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenRegisterInfo.inc
echo Building $(InputFileName) instruction names with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-enums -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrNames.inc
echo Building $(InputFileName) instruction information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-instr-desc -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenInstrInfo.inc
echo Building $(InputFileName) assembly writer with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter.inc
echo Building $(InputFileName) assembly writer #1 with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-asm-writer -asmwriternum=1 -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenAsmWriter1.inc
echo Building $(InputFileName) instruction selector implementation with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-dag-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenDAGISel.inc
echo Building $(InputFileName) subtarget information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-subtarget -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenSubtarget.inc
echo Building $(InputFileName) calling convention information with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-callingconv -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenCallingConv.inc
echo Building $(InputFileName) Fast instruction selection with tblgen
$(ProjectDir)..\bin\$(PlatformName)\$(ConfigurationName)\TableGen.exe -gen-fast-isel -I ..\..\lib\Target -I ..\..\lib\Target\X86 -I ..\..\include $(InputPath) -o X86GenFastISel.inc
"
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|
AdditionalDependencies="$(InputDir)X86InstrInfo.td;$(InputDir)X86RegisterInfo.td;$(InputDir)X86InstrFPStack.td;$(InputDir)X86InstrMMX.td;$(InputDir)X86InstrSSE.td;$(InputDir)X86CallingConv.td;$(InputDir)..\Target.td;$(InputDir)..\TargetSchedule.td;$(InputDir)..\TargetScheduleDAG.td;$(ProjectDir)..\$(IntDir)\TableGen.exe"
|
|
Outputs="X86GenRegisterNames.inc;X86GenRegisterInfo.h.inc;X86GenRegisterInfo.inc;X86GenInstrNames.inc;X86GenInstrInfo.inc;X86GenAsmWriter.inc;X86GenAsmWriter1.inc;X86GenDAGISel.inc;X86GenSubtarget.inc;X86GenCallingConv.inc;X86GenFastISel.inc"
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|
/>
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|
</FileConfiguration>
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|
</File>
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|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86CodeEmitter.cpp"
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|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86COFF.h"
|
|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86CompilationCallback_Win64.asm"
|
|
>
|
|
<FileConfiguration
|
|
Name="Debug|x64"
|
|
>
|
|
<Tool
|
|
Name="VCCustomBuildTool"
|
|
CommandLine="ml64.exe /c /nologo /Fo "$(IntDir)X86CompilationCallback_Win64.obj" /Zi $(InputPath)
"
|
|
Outputs=""$(IntDir)X86CompilationCallback_Win64.obj""
|
|
/>
|
|
</FileConfiguration>
|
|
<FileConfiguration
|
|
Name="Release|x64"
|
|
>
|
|
<Tool
|
|
Name="VCCustomBuildTool"
|
|
CommandLine="ml64.exe /c /nologo /Fo "$(IntDir)X86CompilationCallback_Win64.obj" /Zi $(InputPath)
"
|
|
Outputs=""$(IntDir)X86CompilationCallback_Win64.obj""
|
|
/>
|
|
</FileConfiguration>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.cpp"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ELFWriterInfo.h"
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|
>
|
|
</File>
|
|
<File
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|
RelativePath="..\..\lib\Target\X86\X86FastISel.cpp"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86FastISel.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86FloatingPoint.cpp"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86FloatingPointRegKill.cpp"
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|
>
|
|
</File>
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<File
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|
RelativePath="..\..\lib\Target\X86\X86InstrFormats.td"
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|
>
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|
</File>
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<File
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|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.cpp"
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|
>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86InstrX86-64.td"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelDAGToDAG.cpp"
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|
>
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|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelLowering.cpp"
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|
>
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|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86JITInfo.cpp"
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|
>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.cpp"
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|
>
|
|
</File>
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|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86Relocations.h"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86Subtarget.cpp"
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>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86TargetAsmInfo.cpp"
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>
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|
</File>
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<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetMachine.cpp"
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|
>
|
|
</File>
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|
<Filter
|
|
Name="AsmPrinter"
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|
>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86AsmPrinter.cpp"
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|
>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86AsmPrinter.h"
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>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86ATTAsmPrinter.cpp"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86ATTAsmPrinter.h"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86IntelAsmPrinter.cpp"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\AsmPrinter\X86IntelAsmPrinter.h"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
</Filter>
|
|
<Filter
|
|
Name="Header Files"
|
|
Filter="h;hpp;hxx;hm;inl;inc;xsd"
|
|
UniqueIdentifier="{93995380-89BD-4b04-88EB-625FBE52EBFB}"
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|
>
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<File
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|
RelativePath="..\..\lib\Target\Target.td"
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>
|
|
</File>
|
|
<File
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|
RelativePath="..\..\lib\Target\TargetSchedule.td"
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>
|
|
</File>
|
|
<File
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|
RelativePath="..\..\lib\Target\TargetSelectionDAG.td"
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>
|
|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86.h"
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>
|
|
</File>
|
|
<File
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|
RelativePath="..\..\lib\Target\X86\X86ATTAsmPrinter.h"
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>
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|
</File>
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|
<File
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|
RelativePath="..\..\lib\Target\X86\X86CallingConv.td"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrBuilder.h"
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>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrFPStack.td"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.h"
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>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrInfo.td"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrMMX.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86InstrSSE.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86IntelAsmPrinter.h"
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|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86ISelLowering.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86JITInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86MachineFunctionInfo.h"
|
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>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.h"
|
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>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86RegisterInfo.td"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86Subtarget.h"
|
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>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetAsmInfo.h"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath="..\..\lib\Target\X86\X86TargetMachine.h"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
<Filter
|
|
Name="Generated Tablegen Files"
|
|
>
|
|
<File
|
|
RelativePath=".\X86GenAsmWriter.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenAsmWriter1.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenDAGISel.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenFastISel.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenInstrInfo.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenInstrNames.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterInfo.h.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterInfo.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenRegisterNames.inc"
|
|
>
|
|
</File>
|
|
<File
|
|
RelativePath=".\X86GenSubtarget.inc"
|
|
>
|
|
</File>
|
|
</Filter>
|
|
</Files>
|
|
<Globals>
|
|
</Globals>
|
|
</VisualStudioProject>
|