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94ebfcba48
- This fixes a bug where subregister incompatible with the vregs register class where used. - Implement the case where multiple copies are necessary to cover a given lanemask. Differential Revision: https://reviews.llvm.org/D30438 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298025 91177308-0d34-0410-b5e6-96231b3b80d8
542 lines
23 KiB
C++
542 lines
23 KiB
C++
//===-------- SplitKit.h - Toolkit for splitting live ranges ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SplitAnalysis class as well as mutator functions for
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// live range splitting.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
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#define LLVM_LIB_CODEGEN_SPLITKIT_H
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#include "LiveRangeCalc.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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namespace llvm {
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class ConnectedVNInfoEqClasses;
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class LiveInterval;
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class LiveIntervals;
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class LiveRangeEdit;
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class MachineBlockFrequencyInfo;
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class MachineInstr;
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class MachineLoopInfo;
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class MachineRegisterInfo;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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class VirtRegMap;
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class VNInfo;
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class raw_ostream;
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/// Determines the latest safe point in a block in which we can insert a split,
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/// spill or other instruction related with CurLI.
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class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
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private:
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const LiveIntervals &LIS;
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/// Last legal insert point in each basic block in the current function.
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/// The first entry is the first terminator, the second entry is the
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/// last valid point to insert a split or spill for a variable that is
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/// live into a landing pad successor.
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SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint;
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SlotIndex computeLastInsertPoint(const LiveInterval &CurLI,
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const MachineBasicBlock &MBB);
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public:
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InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
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/// Return the base index of the last valid insert point for \pCurLI in \pMBB.
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SlotIndex getLastInsertPoint(const LiveInterval &CurLI,
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const MachineBasicBlock &MBB) {
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unsigned Num = MBB.getNumber();
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// Inline the common simple case.
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if (LastInsertPoint[Num].first.isValid() &&
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!LastInsertPoint[Num].second.isValid())
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return LastInsertPoint[Num].first;
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return computeLastInsertPoint(CurLI, MBB);
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}
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/// Returns the last insert point as an iterator for \pCurLI in \pMBB.
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MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI,
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MachineBasicBlock &MBB);
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};
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/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
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/// opportunities.
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class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
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public:
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const MachineFunction &MF;
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const VirtRegMap &VRM;
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const LiveIntervals &LIS;
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const MachineLoopInfo &Loops;
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const TargetInstrInfo &TII;
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/// Additional information about basic blocks where the current variable is
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/// live. Such a block will look like one of these templates:
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///
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/// 1. | o---x | Internal to block. Variable is only live in this block.
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/// 2. |---x | Live-in, kill.
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/// 3. | o---| Def, live-out.
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/// 4. |---x o---| Live-in, kill, def, live-out. Counted by NumGapBlocks.
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/// 5. |---o---o---| Live-through with uses or defs.
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/// 6. |-----------| Live-through without uses. Counted by NumThroughBlocks.
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///
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/// Two BlockInfo entries are created for template 4. One for the live-in
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/// segment, and one for the live-out segment. These entries look as if the
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/// block were split in the middle where the live range isn't live.
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///
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/// Live-through blocks without any uses don't get BlockInfo entries. They
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/// are simply listed in ThroughBlocks instead.
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///
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struct BlockInfo {
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MachineBasicBlock *MBB;
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SlotIndex FirstInstr; ///< First instr accessing current reg.
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SlotIndex LastInstr; ///< Last instr accessing current reg.
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SlotIndex FirstDef; ///< First non-phi valno->def, or SlotIndex().
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bool LiveIn; ///< Current reg is live in.
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bool LiveOut; ///< Current reg is live out.
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/// isOneInstr - Returns true when this BlockInfo describes a single
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/// instruction.
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bool isOneInstr() const {
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return SlotIndex::isSameInstr(FirstInstr, LastInstr);
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}
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};
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private:
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// Current live interval.
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const LiveInterval *CurLI;
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/// Insert Point Analysis.
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InsertPointAnalysis IPA;
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// Sorted slot indexes of using instructions.
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SmallVector<SlotIndex, 8> UseSlots;
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/// UseBlocks - Blocks where CurLI has uses.
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SmallVector<BlockInfo, 8> UseBlocks;
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/// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where
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/// the live range has a gap.
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unsigned NumGapBlocks;
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/// ThroughBlocks - Block numbers where CurLI is live through without uses.
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BitVector ThroughBlocks;
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/// NumThroughBlocks - Number of live-through blocks.
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unsigned NumThroughBlocks;
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/// DidRepairRange - analyze was forced to shrinkToUses().
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bool DidRepairRange;
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// Sumarize statistics by counting instructions using CurLI.
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void analyzeUses();
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/// calcLiveBlockInfo - Compute per-block information about CurLI.
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bool calcLiveBlockInfo();
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public:
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SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
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const MachineLoopInfo &mli);
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/// analyze - set CurLI to the specified interval, and analyze how it may be
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/// split.
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void analyze(const LiveInterval *li);
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/// didRepairRange() - Returns true if CurLI was invalid and has been repaired
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/// by analyze(). This really shouldn't happen, but sometimes the coalescer
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/// can create live ranges that end in mid-air.
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bool didRepairRange() const { return DidRepairRange; }
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/// clear - clear all data structures so SplitAnalysis is ready to analyze a
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/// new interval.
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void clear();
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/// getParent - Return the last analyzed interval.
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const LiveInterval &getParent() const { return *CurLI; }
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/// isOriginalEndpoint - Return true if the original live range was killed or
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/// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
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/// and 'use' for an early-clobber def.
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/// This can be used to recognize code inserted by earlier live range
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/// splitting.
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bool isOriginalEndpoint(SlotIndex Idx) const;
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/// getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
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/// This include both use and def operands, at most one entry per instruction.
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ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; }
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/// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
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/// where CurLI has uses.
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ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; }
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/// getNumThroughBlocks - Return the number of through blocks.
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unsigned getNumThroughBlocks() const { return NumThroughBlocks; }
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/// isThroughBlock - Return true if CurLI is live through MBB without uses.
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bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
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/// getThroughBlocks - Return the set of through blocks.
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const BitVector &getThroughBlocks() const { return ThroughBlocks; }
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/// getNumLiveBlocks - Return the number of blocks where CurLI is live.
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unsigned getNumLiveBlocks() const {
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return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
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}
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/// countLiveBlocks - Return the number of blocks where li is live. This is
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/// guaranteed to return the same number as getNumLiveBlocks() after calling
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/// analyze(li).
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unsigned countLiveBlocks(const LiveInterval *li) const;
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typedef SmallPtrSet<const MachineBasicBlock*, 16> BlockPtrSet;
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/// shouldSplitSingleBlock - Returns true if it would help to create a local
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/// live range for the instructions in BI. There is normally no benefit to
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/// creating a live range for a single instruction, but it does enable
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/// register class inflation if the instruction has a restricted register
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/// class.
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///
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/// @param BI The block to be isolated.
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/// @param SingleInstrs True when single instructions should be isolated.
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bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const;
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SlotIndex getLastSplitPoint(unsigned Num) {
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return IPA.getLastInsertPoint(*CurLI, *MF.getBlockNumbered(Num));
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}
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MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) {
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return IPA.getLastInsertPointIter(*CurLI, *BB);
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}
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};
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/// SplitEditor - Edit machine code and LiveIntervals for live range
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/// splitting.
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///
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/// - Create a SplitEditor from a SplitAnalysis.
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/// - Start a new live interval with openIntv.
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/// - Mark the places where the new interval is entered using enterIntv*
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/// - Mark the ranges where the new interval is used with useIntv*
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/// - Mark the places where the interval is exited with exitIntv*.
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/// - Finish the current interval with closeIntv and repeat from 2.
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/// - Rewrite instructions with finish().
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///
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class LLVM_LIBRARY_VISIBILITY SplitEditor {
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SplitAnalysis &SA;
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AliasAnalysis &AA;
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LiveIntervals &LIS;
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VirtRegMap &VRM;
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MachineRegisterInfo &MRI;
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MachineDominatorTree &MDT;
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const TargetInstrInfo &TII;
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const TargetRegisterInfo &TRI;
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const MachineBlockFrequencyInfo &MBFI;
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public:
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/// ComplementSpillMode - Select how the complement live range should be
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/// created. SplitEditor automatically creates interval 0 to contain
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/// anything that isn't added to another interval. This complement interval
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/// can get quite complicated, and it can sometimes be an advantage to allow
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/// it to overlap the other intervals. If it is going to spill anyway, no
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/// registers are wasted by keeping a value in two places at the same time.
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enum ComplementSpillMode {
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/// SM_Partition(Default) - Try to create the complement interval so it
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/// doesn't overlap any other intervals, and the original interval is
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/// partitioned. This may require a large number of back copies and extra
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/// PHI-defs. Only segments marked with overlapIntv will be overlapping.
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SM_Partition,
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/// SM_Size - Overlap intervals to minimize the number of inserted COPY
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/// instructions. Copies to the complement interval are hoisted to their
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/// common dominator, so only one COPY is required per value in the
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/// complement interval. This also means that no extra PHI-defs need to be
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/// inserted in the complement interval.
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SM_Size,
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/// SM_Speed - Overlap intervals to minimize the expected execution
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/// frequency of the inserted copies. This is very similar to SM_Size, but
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/// the complement interval may get some extra PHI-defs.
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SM_Speed
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};
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private:
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/// Edit - The current parent register and new intervals created.
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LiveRangeEdit *Edit;
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/// Index into Edit of the currently open interval.
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/// The index 0 is used for the complement, so the first interval started by
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/// openIntv will be 1.
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unsigned OpenIdx;
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/// The current spill mode, selected by reset().
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ComplementSpillMode SpillMode;
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typedef IntervalMap<SlotIndex, unsigned> RegAssignMap;
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/// Allocator for the interval map. This will eventually be shared with
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/// SlotIndexes and LiveIntervals.
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RegAssignMap::Allocator Allocator;
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/// RegAssign - Map of the assigned register indexes.
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/// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
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/// Idx.
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RegAssignMap RegAssign;
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typedef PointerIntPair<VNInfo*, 1> ValueForcePair;
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typedef DenseMap<std::pair<unsigned, unsigned>, ValueForcePair> ValueMap;
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/// Values - keep track of the mapping from parent values to values in the new
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/// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
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///
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/// 1. No entry - the value is not mapped to Edit.get(RegIdx).
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/// 2. (Null, false) - the value is mapped to multiple values in
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/// Edit.get(RegIdx). Each value is represented by a minimal live range at
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/// its def. The full live range can be inferred exactly from the range
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/// of RegIdx in RegAssign.
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/// 3. (Null, true). As above, but the ranges in RegAssign are too large, and
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/// the live range must be recomputed using LiveRangeCalc::extend().
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/// 4. (VNI, false) The value is mapped to a single new value.
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/// The new value has no live ranges anywhere.
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ValueMap Values;
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/// LRCalc - Cache for computing live ranges and SSA update. Each instance
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/// can only handle non-overlapping live ranges, so use a separate
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/// LiveRangeCalc instance for the complement interval when in spill mode.
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LiveRangeCalc LRCalc[2];
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/// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the
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/// complement interval can overlap the other intervals, so it gets its own
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/// LRCalc instance. When not in spill mode, all intervals can share one.
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LiveRangeCalc &getLRCalc(unsigned RegIdx) {
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return LRCalc[SpillMode != SM_Partition && RegIdx != 0];
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}
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/// Find a subrange corresponding to the lane mask @p LM in the live
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/// interval @p LI. The interval @p LI is assumed to contain such a subrange.
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/// This function is used to find corresponding subranges between the
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/// original interval and the new intervals.
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LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI);
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/// Add a segment to the interval LI for the value number VNI. If LI has
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/// subranges, corresponding segments will be added to them as well, but
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/// with newly created value numbers. If Original is true, dead def will
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/// only be added a subrange of LI if the corresponding subrange of the
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/// original interval has a def at this index. Otherwise, all subranges
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/// of LI will be updated.
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void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original);
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/// defValue - define a value in RegIdx from ParentVNI at Idx.
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/// Idx does not have to be ParentVNI->def, but it must be contained within
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/// ParentVNI's live range in ParentLI. The new value is added to the value
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/// map. The value being defined may either come from rematerialization
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/// (or an inserted copy), or it may be coming from the original interval.
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/// The parameter Original should be true in the latter case, otherwise
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/// it should be false.
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/// Return the new LI value.
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VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx,
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bool Original);
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/// forceRecompute - Force the live range of ParentVNI in RegIdx to be
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/// recomputed by LiveRangeCalc::extend regardless of the number of defs.
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/// This is used for values whose live range doesn't match RegAssign exactly.
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/// They could have rematerialized, or back-copies may have been moved.
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void forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI);
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/// defFromParent - Define Reg from ParentVNI at UseIdx using either
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/// rematerialization or a COPY from parent. Return the new value.
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VNInfo *defFromParent(unsigned RegIdx,
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VNInfo *ParentVNI,
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SlotIndex UseIdx,
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MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I);
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/// removeBackCopies - Remove the copy instructions that defines the values
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/// in the vector in the complement interval.
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void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
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/// getShallowDominator - Returns the least busy dominator of MBB that is
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/// also dominated by DefMBB. Busy is measured by loop depth.
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MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
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MachineBasicBlock *DefMBB);
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/// Find out all the backCopies dominated by others.
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void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
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SmallVectorImpl<VNInfo *> &BackCopies);
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/// Hoist back-copies to the complement interval. It tries to hoist all
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/// the back-copies to one BB if it is beneficial, or else simply remove
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/// redundant backcopies dominated by others.
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void hoistCopies();
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/// transferValues - Transfer values to the new ranges.
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/// Return true if any ranges were skipped.
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bool transferValues();
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/// Live range @p LR corresponding to the lane Mask @p LM has a live
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/// PHI def at the beginning of block @p B. Extend the range @p LR of
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/// all predecessor values that reach this def. If @p LR is a subrange,
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/// the array @p Undefs is the set of all locations where it is undefined
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/// via <def,read-undef> in other subranges for the same register.
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void extendPHIRange(MachineBasicBlock &B, LiveRangeCalc &LRC,
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LiveRange &LR, LaneBitmask LM,
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ArrayRef<SlotIndex> Undefs);
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/// extendPHIKillRanges - Extend the ranges of all values killed by original
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/// parent PHIDefs.
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void extendPHIKillRanges();
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/// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
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void rewriteAssigned(bool ExtendRanges);
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/// deleteRematVictims - Delete defs that are dead after rematerializing.
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void deleteRematVictims();
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/// Add a copy instruction copying \p FromReg to \p ToReg before
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/// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
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/// necessary to construct a sequence of copies to cover it exactly.
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SlotIndex buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask,
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MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
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bool Late, unsigned RegIdx);
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SlotIndex buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg,
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MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore,
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unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex PrevCopy);
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public:
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/// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
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/// Newly created intervals will be appended to newIntervals.
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SplitEditor(SplitAnalysis &SA, AliasAnalysis &AA, LiveIntervals&,
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VirtRegMap&, MachineDominatorTree&,
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MachineBlockFrequencyInfo &);
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/// reset - Prepare for a new split.
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void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
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/// Create a new virtual register and live interval.
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/// Return the interval index, starting from 1. Interval index 0 is the
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/// implicit complement interval.
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unsigned openIntv();
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/// currentIntv - Return the current interval index.
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unsigned currentIntv() const { return OpenIdx; }
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/// selectIntv - Select a previously opened interval index.
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void selectIntv(unsigned Idx);
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/// enterIntvBefore - Enter the open interval before the instruction at Idx.
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/// If the parent interval is not live before Idx, a COPY is not inserted.
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/// Return the beginning of the new live range.
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SlotIndex enterIntvBefore(SlotIndex Idx);
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/// enterIntvAfter - Enter the open interval after the instruction at Idx.
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/// Return the beginning of the new live range.
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SlotIndex enterIntvAfter(SlotIndex Idx);
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/// enterIntvAtEnd - Enter the open interval at the end of MBB.
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/// Use the open interval from the inserted copy to the MBB end.
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/// Return the beginning of the new live range.
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SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
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/// useIntv - indicate that all instructions in MBB should use OpenLI.
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void useIntv(const MachineBasicBlock &MBB);
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/// useIntv - indicate that all instructions in range should use OpenLI.
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void useIntv(SlotIndex Start, SlotIndex End);
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/// leaveIntvAfter - Leave the open interval after the instruction at Idx.
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/// Return the end of the live range.
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SlotIndex leaveIntvAfter(SlotIndex Idx);
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/// leaveIntvBefore - Leave the open interval before the instruction at Idx.
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/// Return the end of the live range.
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SlotIndex leaveIntvBefore(SlotIndex Idx);
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/// leaveIntvAtTop - Leave the interval at the top of MBB.
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/// Add liveness from the MBB top to the copy.
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/// Return the end of the live range.
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SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
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/// overlapIntv - Indicate that all instructions in range should use the open
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/// interval, but also let the complement interval be live.
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///
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/// This doubles the register pressure, but is sometimes required to deal with
|
|
/// register uses after the last valid split point.
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|
///
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|
/// The Start index should be a return value from a leaveIntv* call, and End
|
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/// should be in the same basic block. The parent interval must have the same
|
|
/// value across the range.
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///
|
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void overlapIntv(SlotIndex Start, SlotIndex End);
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|
|
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/// finish - after all the new live ranges have been created, compute the
|
|
/// remaining live range, and rewrite instructions to use the new registers.
|
|
/// @param LRMap When not null, this vector will map each live range in Edit
|
|
/// back to the indices returned by openIntv.
|
|
/// There may be extra indices created by dead code elimination.
|
|
void finish(SmallVectorImpl<unsigned> *LRMap = nullptr);
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|
|
|
/// dump - print the current interval mapping to dbgs().
|
|
void dump() const;
|
|
|
|
// ===--- High level methods ---===
|
|
|
|
/// splitSingleBlock - Split CurLI into a separate live interval around the
|
|
/// uses in a single block. This is intended to be used as part of a larger
|
|
/// split, and doesn't call finish().
|
|
void splitSingleBlock(const SplitAnalysis::BlockInfo &BI);
|
|
|
|
/// splitLiveThroughBlock - Split CurLI in the given block such that it
|
|
/// enters the block in IntvIn and leaves it in IntvOut. There may be uses in
|
|
/// the block, but they will be ignored when placing split points.
|
|
///
|
|
/// @param MBBNum Block number.
|
|
/// @param IntvIn Interval index entering the block.
|
|
/// @param LeaveBefore When set, leave IntvIn before this point.
|
|
/// @param IntvOut Interval index leaving the block.
|
|
/// @param EnterAfter When set, enter IntvOut after this point.
|
|
void splitLiveThroughBlock(unsigned MBBNum,
|
|
unsigned IntvIn, SlotIndex LeaveBefore,
|
|
unsigned IntvOut, SlotIndex EnterAfter);
|
|
|
|
/// splitRegInBlock - Split CurLI in the given block such that it enters the
|
|
/// block in IntvIn and leaves it on the stack (or not at all). Split points
|
|
/// are placed in a way that avoids putting uses in the stack interval. This
|
|
/// may require creating a local interval when there is interference.
|
|
///
|
|
/// @param BI Block descriptor.
|
|
/// @param IntvIn Interval index entering the block. Not 0.
|
|
/// @param LeaveBefore When set, leave IntvIn before this point.
|
|
void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
|
|
unsigned IntvIn, SlotIndex LeaveBefore);
|
|
|
|
/// splitRegOutBlock - Split CurLI in the given block such that it enters the
|
|
/// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
|
|
/// Split points are placed to avoid interference and such that the uses are
|
|
/// not in the stack interval. This may require creating a local interval
|
|
/// when there is interference.
|
|
///
|
|
/// @param BI Block descriptor.
|
|
/// @param IntvOut Interval index leaving the block.
|
|
/// @param EnterAfter When set, enter IntvOut after this point.
|
|
void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
|
|
unsigned IntvOut, SlotIndex EnterAfter);
|
|
};
|
|
|
|
}
|
|
|
|
#endif
|