llvm/lib/Target
Chris Lattner a243db8c41 Fix calls that need to store values in stack slots, to not copy the stack
pointer.  This allows us to emit stuff like this:

        li r10, 0
        stw r10, 56(r1)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

instead of this:

        or r2, r1, r1     ;; Extraneous copy.
        li r10, 0
        stw r10, 56(r2)
        or r3, r10, r10
        or r4, r10, r10
        or r5, r10, r10
        or r6, r10, r10
        or r7, r10, r10
        or r8, r10, r10
        or r9, r10, r10
        bl L_bar$stub

wowness.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25221 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 19:55:07 +00:00
..
Alpha this pattern was bogus 2006-01-11 03:33:06 +00:00
CBackend yet more C++ standards-compliance stuff. 2005-12-27 10:40:34 +00:00
IA64 tblgen does this now 2006-01-11 19:53:22 +00:00
PowerPC Fix calls that need to store values in stack slots, to not copy the stack 2006-01-11 19:55:07 +00:00
Skeleton Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
Sparc This is no longer needed 2006-01-11 19:52:46 +00:00
SparcV8 This is no longer needed 2006-01-11 19:52:46 +00:00
SparcV9 Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
X86 * Add special entry code main() (to set x87 to 64-bit precision). 2006-01-11 06:09:51 +00:00
Makefile DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now 2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp Rename MRegisterDesc -> TargetRegisterDesc for consistency 2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp Preparation of supporting scheduling info. Need to find info based on selected 2005-10-25 15:15:28 +00:00
Target.td New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp Remove the X86 and PowerPC Simple instruction selectors; their time has 2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp 1. Use SubtargetFeatures in llc/lli. 2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td add a marker 2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
TargetSubtarget.cpp