mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-02 16:56:50 +00:00
a347f85dbe
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
726 B
Makefile
23 lines
726 B
Makefile
##===- lib/Target/CellSPU/Makefile -------------------------*- Makefile -*-===##
|
|
#
|
|
# The LLVM Compiler Infrastructure
|
|
#
|
|
# This file is distributed under the University of Illinois Open Source
|
|
# License. See LICENSE.TXT for details.
|
|
#
|
|
##===----------------------------------------------------------------------===##
|
|
|
|
LEVEL = ../../..
|
|
LIBRARYNAME = LLVMCellSPUCodeGen
|
|
TARGET = SPU
|
|
BUILT_SOURCES = SPUGenInstrNames.inc \
|
|
SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \
|
|
SPUGenRegisterNames.inc SPUGenRegisterDesc.inc \
|
|
SPUGenRegisterInfo.h.inc SPUGenRegisterInfo.inc \
|
|
SPUGenInstrInfo.inc SPUGenDAGISel.inc \
|
|
SPUGenSubtarget.inc SPUGenCallingConv.inc
|
|
|
|
DIRS = TargetInfo
|
|
|
|
include $(LEVEL)/Makefile.common
|