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fa2569c73b
According to spec cvtdq2pd and cvtps2pd instructions don't require memory operand to be aligned to 16 bytes. This patch removes this requirement from the memory folding table. Differential Revision: https://reviews.llvm.org/D23919 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@280402 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
1.4 KiB
LLVM
40 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=X86-64
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; RUN: llc -mtriple=i386-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=I386
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; Check that unaligned loads merge with cvtdq2pd and cvtps2pd.
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define <2 x double> @peephole_cvtps2pd(<4 x float>* %a0) {
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; X86-64-LABEL: peephole_cvtps2pd:
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; X86-64: # BB#0:
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; X86-64-NEXT: cvtps2pd (%rdi), %xmm0
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; X86-64-NEXT: retq
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;
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; I386-LABEL: peephole_cvtps2pd:
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; I386: # BB#0:
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; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
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; I386-NEXT: cvtps2pd (%eax), %xmm0
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; I386-NEXT: retl
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%1 = load <4 x float>, <4 x float>* %a0, align 1
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%2 = shufflevector <4 x float> %1, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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%3 = fpext <2 x float> %2 to <2 x double>
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ret <2 x double> %3
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}
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define <2 x double> @peephole_cvtdq2pd(<4 x i32>* %a0) {
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; X86-64-LABEL: peephole_cvtdq2pd:
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; X86-64: # BB#0:
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; X86-64-NEXT: cvtdq2pd (%rdi), %xmm0
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; X86-64-NEXT: retq
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;
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; I386-LABEL: peephole_cvtdq2pd:
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; I386: # BB#0:
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; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
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; I386-NEXT: cvtdq2pd (%eax), %xmm0
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; I386-NEXT: retl
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%1 = load <4 x i32>, <4 x i32>* %a0, align 1
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%2 = shufflevector <4 x i32> %1, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
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%3 = sitofp <2 x i32> %2 to <2 x double>
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ret <2 x double> %3
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}
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