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https://github.com/RPCSX/llvm.git
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68e74bdd60
Intrinsic::maxnum and Intrinsic::minnum, along with the associated libc function calls (fmax[f], etc.) generally map to function calls after lowering. For some vector types with QPX at least, however, we can legally lower these, and we don't need to prohibit CTR-based loops on their account. It turned out, however, that the logic that checked the opcodes associated with intrinsics was broken (it would set the Opcode variable, but that variable was later checked only if set for some otherwise-external function call. This fixes the latter problem and adds the FMAX/MINNUM mappings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264532 91177308-0d34-0410-b5e6-96231b3b80d8
232 lines
5.5 KiB
LLVM
232 lines
5.5 KiB
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -mcpu=a2q < %s | FileCheck %s --check-prefix=QPX
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target triple = "powerpc64-unknown-linux-gnu"
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declare float @fabsf(float)
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declare float @fminf(float, float)
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declare double @fmin(double, double)
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declare float @llvm.minnum.f32(float, float)
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declare double @llvm.minnum.f64(double, double)
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declare float @fmaxf(float, float)
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declare double @fmax(double, double)
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declare float @llvm.maxnum.f32(float, float)
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declare double @llvm.maxnum.f64(double, double)
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declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
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declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)
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declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
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declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)
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define void @test1(float %f, float* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call float @llvm.minnum.f32(float %f, float 1.0)
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store float %0, float* %fp, align 4
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test1:
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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define void @test1v(<4 x float> %f, <4 x float>* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call <4 x float> @llvm.minnum.v4f32(<4 x float> %f, <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>)
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store <4 x float> %0, <4 x float>* %fp, align 16
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test1v:
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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; QPX-LABEL: test1v:
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; QPX: mtctr
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; QPX-NOT: bl fminf
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; QPX: blr
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define void @test1a(float %f, float* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call float @fminf(float %f, float 1.0) readnone
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store float %0, float* %fp, align 4
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test1a:
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; CHECK-NOT: mtctr
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; CHECK: bl fminf
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define void @test2(float %f, float* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call float @llvm.maxnum.f32(float %f, float 1.0)
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store float %0, float* %fp, align 4
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test2:
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; CHECK-NOT: mtctr
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; CHECK: bl fmaxf
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define void @test2v(<4 x double> %f, <4 x double>* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %f, <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>)
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store <4 x double> %0, <4 x double>* %fp, align 16
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test2v:
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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; QPX-LABEL: test2v:
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; QPX: mtctr
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; QPX-NOT: bl fmax
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; QPX: blr
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define void @test2a(float %f, float* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call float @fmaxf(float %f, float 1.0) readnone
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store float %0, float* %fp, align 4
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test2a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmaxf
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define void @test3(double %f, double* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call double @llvm.minnum.f64(double %f, double 1.0)
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store double %0, double* %fp, align 8
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test3:
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; CHECK-NOT: mtctr
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; CHECK: bl fmin
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define void @test3a(double %f, double* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call double @fmin(double %f, double 1.0) readnone
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store double %0, double* %fp, align 8
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test3a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmin
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define void @test4(double %f, double* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call double @llvm.maxnum.f64(double %f, double 1.0)
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store double %0, double* %fp, align 8
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test4:
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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define void @test4a(double %f, double* %fp) {
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entry:
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br label %loop_body
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loop_body:
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%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
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%0 = call double @fmax(double %f, double 1.0) readnone
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store double %0, double* %fp, align 8
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%1 = add i64 %invar_address.dim.0.01, 1
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%2 = icmp eq i64 %1, 2
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br i1 %2, label %loop_exit, label %loop_body
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loop_exit:
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ret void
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}
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; CHECK-LABEL: test4a:
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; CHECK-NOT: mtctr
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; CHECK: bl fmax
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