mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-11 05:35:11 +00:00
027fdbe3ba
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59953 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.5 KiB
TableGen
41 lines
1.5 KiB
TableGen
//===- PIC16.td - Describe the PIC16 Target Machine -----------*- tblgen -*-==//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
// This is the top level entry point for the PIC16 target.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Target-independent interfaces
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
include "llvm/Target/Target.td"
|
|
|
|
include "PIC16RegisterInfo.td"
|
|
include "PIC16InstrInfo.td"
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Subtarget Features.
|
|
//===----------------------------------------------------------------------===//
|
|
def FeatureCooper : SubtargetFeature<"cooper", "IsCooper", "true",
|
|
"PIC16 Cooper ISA Support">;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// PIC16 supported processors.
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
def : Processor<"generic", NoItineraries, []>;
|
|
def : Processor<"cooper", NoItineraries, [FeatureCooper]>;
|
|
|
|
|
|
def PIC16InstrInfo : InstrInfo {}
|
|
|
|
def PIC16 : Target {
|
|
let InstructionSet = PIC16InstrInfo;
|
|
}
|
|
|