mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-28 23:43:25 +00:00
4a9f150926
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.0 KiB
LLVM
27 lines
1.0 KiB
LLVM
; RUN: llc < %s -combiner-alias-analysis -march=x86-64 | FileCheck %s
|
|
|
|
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
|
|
target triple = "x86_64-apple-darwin10.4"
|
|
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
|
|
|
|
define fastcc i32 @cli_magic_scandesc(i8* %in) nounwind ssp {
|
|
entry:
|
|
%a = alloca [64 x i8]
|
|
%b = getelementptr inbounds [64 x i8]* %a, i64 0, i32 0
|
|
%c = getelementptr inbounds [64 x i8]* %a, i64 0, i32 30
|
|
%d = load i8* %b, align 8
|
|
%e = load i8* %c, align 8
|
|
%f = bitcast [64 x i8]* %a to i8*
|
|
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %f, i8* %in, i64 64, i32 8, i1 false) nounwind
|
|
store i8 %d, i8* %b, align 8
|
|
store i8 %e, i8* %c, align 8
|
|
ret i32 0
|
|
}
|
|
|
|
; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax
|
|
; CHECK: movb 30(%rsp), %dl
|
|
; CHECK: movb (%rsp), %sil
|
|
; CHECK: movb %sil, (%rsp)
|
|
; CHECK: movb %dl, 30(%rsp)
|
|
; CHECK: callq ___stack_chk_fail
|