llvm/test/CodeGen
Simon Pilgrim ac36473266 Regenerate test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279385 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-20 21:35:45 +00:00
..
AArch64 GlobalISel: support legalization of G_FCONSTANTs 2016-08-19 22:40:08 +00:00
AMDGPU Revert "RegScavenging: Add scavengeRegisterBackwards()" 2016-08-19 03:03:24 +00:00
ARM Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd" 2016-08-19 20:22:39 +00:00
BPF
Generic
Hexagon [Hexagon] Add RUN line to test 2016-08-19 19:36:35 +00:00
Inputs
Lanai
Mips Revert "RegScavenging: Add scavengeRegisterBackwards()" 2016-08-19 03:03:24 +00:00
MIR
MSP430 Revert r279242 - it's failing the tests 2016-08-19 14:18:34 +00:00
NVPTX [NVPTX] Switch nvptx-use-infer-addrspace to true. 2016-08-19 20:46:45 +00:00
PowerPC Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged." 2016-08-19 18:17:04 +00:00
SPARC
SystemZ [SystemZ] Use valid base/index regs for inline asm 2016-08-18 21:44:15 +00:00
Thumb Revert "RegScavenging: Add scavengeRegisterBackwards()" 2016-08-19 03:03:24 +00:00
Thumb2 Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged." 2016-08-19 18:17:04 +00:00
WebAssembly
WinEH
X86 Regenerate test 2016-08-20 21:35:45 +00:00
XCore