llvm/test/CodeGen/AArch64/arm64-const-addr.ll
Tim Northover bde073f537 AArch64: allow MOV (imm) alias to be printed
The backend has been around for years, it's pretty ridiculous that we can't
even use the preferred form for printing "MOV" aliases. Unfortunately, TableGen
can't handle the complex predicates when printing so it's a bunch of nasty C++.
Oh well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272865 91177308-0d34-0410-b5e6-96231b3b80d8
2016-06-16 01:42:25 +00:00

24 lines
683 B
LLVM

; RUN: llc -mtriple=arm64-darwin-unknown < %s | FileCheck %s
%T = type { i32, i32, i32, i32 }
; Test if the constant base address gets only materialized once.
define i32 @test1() nounwind {
; CHECK-LABEL: test1
; CHECK: mov w8, #68091904
; CHECK-NEXT: movk w8, #49152
; CHECK-NEXT: ldp w9, w10, [x8, #4]
; CHECK: ldr w8, [x8, #12]
%at = inttoptr i64 68141056 to %T*
%o1 = getelementptr %T, %T* %at, i32 0, i32 1
%t1 = load i32, i32* %o1
%o2 = getelementptr %T, %T* %at, i32 0, i32 2
%t2 = load i32, i32* %o2
%a1 = add i32 %t1, %t2
%o3 = getelementptr %T, %T* %at, i32 0, i32 3
%t3 = load i32, i32* %o3
%a2 = add i32 %a1, %t3
ret i32 %a2
}