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9d25b660b6
This bug (llvm.org/PR28124) was introduced by r237977, which refactored the tail call sequence to be generated in two passes instead of one. Unfortunately, the stack adjustment produced by the first pass was not recognized by X86FrameLowering::mergeSPUpdates() in all cases, causing code such as the following, which clobbers the return address, to be generated: popl %edi popl %edi pushl %eax jmp tailcallee # TAILCALL To fix the problem, the entire stack adjustment is performed in X86ExpandPseudo::ExpandMI() for tail calls. Patch by Magnus Lång <margnus1@gmail.com> Differential Revision: http://reviews.llvm.org/D21325 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275103 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
3.5 KiB
LLVM
107 lines
3.5 KiB
LLVM
; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
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; Check the HiPE calling convention works (x86-64)
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define void @zap(i64 %a, i64 %b) nounwind {
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entry:
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; CHECK: movq %rsi, %rax
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; CHECK-NEXT: movl $8, %ecx
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; CHECK-NEXT: movl $9, %r8d
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; CHECK-NEXT: movq %rdi, %rsi
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; CHECK-NEXT: movq %rax, %rdx
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; CHECK-NEXT: callq addfour
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%0 = call cc 11 {i64, i64, i64} @addfour(i64 undef, i64 undef, i64 %a, i64 %b, i64 8, i64 9)
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%res = extractvalue {i64, i64, i64} %0, 2
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; CHECK: movl $1, %edx
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; CHECK-NEXT: movl $2, %ecx
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; CHECK-NEXT: movl $3, %r8d
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; CHECK-NEXT: movq %rax, %r9
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; CHECK: callq foo
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tail call void @foo(i64 undef, i64 undef, i64 1, i64 2, i64 3, i64 %res) nounwind
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ret void
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}
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define cc 11 {i64, i64, i64} @addfour(i64 %hp, i64 %p, i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
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entry:
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; CHECK: leaq (%rsi,%rdx), %rax
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; CHECK-NEXT: addq %rcx, %rax
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; CHECK-NEXT: addq %r8, %rax
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%0 = add i64 %x, %y
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%1 = add i64 %0, %z
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%2 = add i64 %1, %w
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; CHECK: ret
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%res = insertvalue {i64, i64, i64} undef, i64 %2, 2
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ret {i64, i64, i64} %res
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}
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define cc 11 void @foo(i64 %hp, i64 %p, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
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entry:
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; CHECK: movq %r15, 40(%rsp)
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; CHECK-NEXT: movq %rbp, 32(%rsp)
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; CHECK-NEXT: movq %rsi, 24(%rsp)
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; CHECK-NEXT: movq %rdx, 16(%rsp)
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; CHECK-NEXT: movq %rcx, 8(%rsp)
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; CHECK-NEXT: movq %r8, (%rsp)
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%hp_var = alloca i64
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%p_var = alloca i64
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%arg0_var = alloca i64
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%arg1_var = alloca i64
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%arg2_var = alloca i64
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%arg3_var = alloca i64
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store i64 %hp, i64* %hp_var
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store i64 %p, i64* %p_var
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store i64 %arg0, i64* %arg0_var
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store i64 %arg1, i64* %arg1_var
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store i64 %arg2, i64* %arg2_var
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store i64 %arg3, i64* %arg3_var
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; CHECK: movq 40(%rsp), %r15
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; CHECK-NEXT: movq 32(%rsp), %rbp
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; CHECK-NEXT: movq 24(%rsp), %rsi
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; CHECK-NEXT: movq 16(%rsp), %rdx
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; CHECK-NEXT: movq 8(%rsp), %rcx
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%0 = load i64, i64* %hp_var
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%1 = load i64, i64* %p_var
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%2 = load i64, i64* %arg0_var
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%3 = load i64, i64* %arg1_var
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%4 = load i64, i64* %arg2_var
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%5 = load i64, i64* %arg3_var
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; CHECK: jmp bar
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tail call cc 11 void @bar(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) nounwind
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ret void
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}
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define cc 11 void @baz() nounwind {
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%tmp_clos = load i64, i64* @clos
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%tmp_clos2 = inttoptr i64 %tmp_clos to i64*
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%indirect_call = bitcast i64* %tmp_clos2 to void (i64, i64, i64)*
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; CHECK: movl $42, %esi
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; CHECK-NEXT: jmpq *(%rax)
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tail call cc 11 void %indirect_call(i64 undef, i64 undef, i64 42) nounwind
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ret void
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}
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; Sanity-check the tail call sequence. Number of arguments was chosen as to
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; expose a bug where the tail call sequence clobbered the stack.
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define cc 11 { i64, i64, i64 } @tailcaller(i64 %hp, i64 %p) #0 {
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; CHECK: movl $15, %esi
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; CHECK-NEXT: movl $31, %edx
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; CHECK-NEXT: movl $47, %ecx
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; CHECK-NEXT: movl $63, %r8d
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: jmp tailcallee
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%ret = tail call cc11 { i64, i64, i64 } @tailcallee(i64 %hp, i64 %p, i64 15,
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i64 31, i64 47, i64 63, i64 79) #1
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ret { i64, i64, i64 } %ret
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}
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!hipe.literals = !{ !0, !1, !2 }
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!0 = !{ !"P_NSP_LIMIT", i32 160 }
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!1 = !{ !"X86_LEAF_WORDS", i32 24 }
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!2 = !{ !"AMD64_LEAF_WORDS", i32 24 }
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@clos = external constant i64
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declare cc 11 void @bar(i64, i64, i64, i64, i64, i64)
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declare cc 11 { i64, i64, i64 } @tailcallee(i64, i64, i64, i64, i64, i64, i64)
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