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664a3a9314
xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller. This fixes PR28146. The original commit tried inserting an 8bit-subreg into a GR32 (not GR32_ABCD) which was not appreciated by fast regalloc on 32-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274802 91177308-0d34-0410-b5e6-96231b3b80d8
84 lines
2.1 KiB
LLVM
84 lines
2.1 KiB
LLVM
; RUN: llc -mcpu=core-avx2 -mtriple=x86_64 -o - %s | FileCheck %s
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define i1 @try_cmpxchg(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: try_cmpxchg:
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; CHECK: cmpxchg16b
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; CHECK-NOT: cmp
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; CHECK: sete %al
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; CHECK: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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ret i1 %success
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}
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define void @cmpxchg_flow(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_flow:
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; CHECK: cmpxchg16b
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; CHECK-NOT: cmp
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; CHECK-NOT: set
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; CHECK: {{jne|jeq}}
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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br i1 %success, label %true, label %false
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true:
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call void @foo()
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ret void
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false:
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call void @bar()
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ret void
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}
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; Can't use the flags here because cmpxchg16b only sets ZF.
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define i1 @cmpxchg_arithcmp(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_arithcmp:
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; CHECK: cmpxchg16b
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; CHECK: cmpq
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; CHECK: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%oldval = extractvalue { i128, i1 } %pair, 0
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%success = icmp sge i128 %oldval, %desired
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ret i1 %success
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}
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define i128 @cmpxchg_zext(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_zext:
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; CHECK: xorl
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; CHECK: cmpxchg16b
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; CHECK-NOT: cmpq
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; CHECK: sete
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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%mask = zext i1 %success to i128
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ret i128 %mask
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}
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define i128 @cmpxchg_use_eflags_and_val(i128* %addr, i128 %offset) {
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; CHECK-LABEL: cmpxchg_use_eflags_and_val:
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; CHECK: cmpxchg16b
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; CHECK-NOT: cmpq
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; CHECK: jne
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entry:
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%init = load atomic i128, i128* %addr seq_cst, align 16
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br label %loop
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loop:
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%old = phi i128 [%init, %entry], [%oldval, %loop]
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%new = add i128 %old, %offset
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%pair = cmpxchg i128* %addr, i128 %old, i128 %new seq_cst seq_cst
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%oldval = extractvalue { i128, i1 } %pair, 0
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%success = extractvalue { i128, i1 } %pair, 1
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br i1 %success, label %done, label %loop
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done:
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ret i128 %old
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}
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declare void @foo()
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declare void @bar()
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