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b7d0c90c44
wide vectors. Likewise, change VSTn intrinsics to take separate arguments for each vector in a multi-vector struct. Adjust tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77468 91177308-0d34-0410-b5e6-96231b3b80d8
78 lines
2.5 KiB
LLVM
78 lines
2.5 KiB
LLVM
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t
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; RUN: grep {vst1\\.8} %t | count 2
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; RUN: grep {vst1\\.16} %t | count 2
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; RUN: grep {vst1\\.32} %t | count 4
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; RUN: grep {vst1\\.64} %t | count 2
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define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
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%tmp1 = load <8 x i8>* %B
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call void @llvm.arm.neon.vst1i.v8i8(i8* %A, <8 x i8> %tmp1)
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ret void
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}
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define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind {
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%tmp1 = load <4 x i16>* %B
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call void @llvm.arm.neon.vst1i.v4i16(i16* %A, <4 x i16> %tmp1)
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ret void
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}
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define void @vst1i32(i32* %A, <2 x i32>* %B) nounwind {
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%tmp1 = load <2 x i32>* %B
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call void @llvm.arm.neon.vst1i.v2i32(i32* %A, <2 x i32> %tmp1)
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ret void
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}
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define void @vst1f(float* %A, <2 x float>* %B) nounwind {
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%tmp1 = load <2 x float>* %B
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call void @llvm.arm.neon.vst1f.v2f32(float* %A, <2 x float> %tmp1)
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ret void
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}
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define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
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%tmp1 = load <1 x i64>* %B
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call void @llvm.arm.neon.vst1i.v1i64(i64* %A, <1 x i64> %tmp1)
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ret void
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}
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define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
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%tmp1 = load <16 x i8>* %B
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call void @llvm.arm.neon.vst1i.v16i8(i8* %A, <16 x i8> %tmp1)
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ret void
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}
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define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
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%tmp1 = load <8 x i16>* %B
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call void @llvm.arm.neon.vst1i.v8i16(i16* %A, <8 x i16> %tmp1)
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ret void
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}
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define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind {
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%tmp1 = load <4 x i32>* %B
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call void @llvm.arm.neon.vst1i.v4i32(i32* %A, <4 x i32> %tmp1)
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ret void
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}
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define void @vst1Qf(float* %A, <4 x float>* %B) nounwind {
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%tmp1 = load <4 x float>* %B
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call void @llvm.arm.neon.vst1f.v4f32(float* %A, <4 x float> %tmp1)
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ret void
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}
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define void @vst1Qi64(i64* %A, <2 x i64>* %B) nounwind {
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%tmp1 = load <2 x i64>* %B
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call void @llvm.arm.neon.vst1i.v2i64(i64* %A, <2 x i64> %tmp1)
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ret void
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}
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declare void @llvm.arm.neon.vst1i.v8i8(i8*, <8 x i8>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v4i16(i16*, <4 x i16>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v2i32(i32*, <2 x i32>) nounwind readnone
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declare void @llvm.arm.neon.vst1f.v2f32(float*, <2 x float>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v1i64(i64*, <1 x i64>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v16i8(i8*, <16 x i8>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v8i16(i16*, <8 x i16>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v4i32(i32*, <4 x i32>) nounwind readnone
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declare void @llvm.arm.neon.vst1f.v4f32(float*, <4 x float>) nounwind readnone
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declare void @llvm.arm.neon.vst1i.v2i64(i64*, <2 x i64>) nounwind readnone
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