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538287dea2
The ABI allows sub-128 vectors to be passed and returned in registers, with the vector occupying the upper part of a register. We therefore want to legalize those types by widening the vector rather than promoting the elements. The patch includes some simple tests for sub-128 vectors and also tests that we can recognize various pack sequences, some of which use sub-128 vectors as temporary results. One of these forms is based on the pack sequences generated by llvmpipe when no intrinsics are used. Signed unpacks are recognized as BUILD_VECTORs whose elements are individually sign-extended. Unsigned unpacks can have the equivalent form with zero extension, but they also occur as shuffles in which some elements are zero. Based on a patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236525 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
; Test the handling of incoming vector arguments.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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; This routine has 10 vector arguments, which fill up %v24-%v31 and
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; the two double-wide stack slots at 160 and 176.
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define <4 x i32> @foo(<4 x i32> %v1, <4 x i32> %v2, <4 x i32> %v3, <4 x i32> %v4,
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<4 x i32> %v5, <4 x i32> %v6, <4 x i32> %v7, <4 x i32> %v8,
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<4 x i32> %v9, <4 x i32> %v10) {
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; CHECK-LABEL: foo:
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; CHECK: vl [[REG1:%v[0-9]+]], 176(%r15)
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; CHECK: vsf %v24, %v26, [[REG1]]
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; CHECK: br %r14
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%y = sub <4 x i32> %v2, %v10
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ret <4 x i32> %y
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}
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; This routine has 10 vector arguments, which fill up %v24-%v31 and
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; the two single-wide stack slots at 160 and 168.
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define <4 x i8> @bar(<4 x i8> %v1, <4 x i8> %v2, <4 x i8> %v3, <4 x i8> %v4,
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<4 x i8> %v5, <4 x i8> %v6, <4 x i8> %v7, <4 x i8> %v8,
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<4 x i8> %v9, <4 x i8> %v10) {
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; CHECK-LABEL: bar:
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; CHECK: vlrepg [[REG1:%v[0-9]+]], 168(%r15)
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; CHECK: vsb %v24, %v26, [[REG1]]
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; CHECK: br %r14
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%y = sub <4 x i8> %v2, %v10
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ret <4 x i8> %y
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}
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