llvm/test/CodeGen/X86/coalesce-esp.ll
Chris Lattner 47cdf4abff Make the NDEBUG assertion stronger and more clear what is
happening.

Enhance scheduling to set the DEAD flag on implicit defs
more aggressively.  Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use.  Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.

This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more 
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.

Talking to codegen folks about both these issues, but I need
this patch in in the meantime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 05:40:48 +00:00

37 lines
1.5 KiB
LLVM

; RUN: llc < %s | grep {movl %esp, %ecx}
; PR4572
; Don't coalesce with %esp if it would end up putting %esp in
; the index position of an address, because that can't be
; encoded on x86. It would actually be slightly better to
; swap the address operands though, since there's no scale.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-mingw32"
%"struct.std::valarray<unsigned int>" = type { i32, i32* }
define void @_ZSt17__gslice_to_indexjRKSt8valarrayIjES2_RS0_(i32 %__o, %"struct.std::valarray<unsigned int>"* nocapture %__l, %"struct.std::valarray<unsigned int>"* nocapture %__s, %"struct.std::valarray<unsigned int>"* nocapture %__i) nounwind {
entry:
%0 = alloca i32, i32 undef, align 4 ; <i32*> [#uses=1]
br i1 undef, label %return, label %bb4
bb4: ; preds = %bb7.backedge, %entry
%indvar = phi i32 [ %indvar.next, %bb7.backedge ], [ 0, %entry ] ; <i32> [#uses=2]
%scevgep24.sum = sub i32 undef, %indvar ; <i32> [#uses=2]
%scevgep25 = getelementptr i32* %0, i32 %scevgep24.sum ; <i32*> [#uses=1]
%scevgep27 = getelementptr i32* undef, i32 %scevgep24.sum ; <i32*> [#uses=1]
%1 = load i32* %scevgep27, align 4 ; <i32> [#uses=0]
br i1 undef, label %bb7.backedge, label %bb5
bb5: ; preds = %bb4
store i32 0, i32* %scevgep25, align 4
br label %bb7.backedge
bb7.backedge: ; preds = %bb5, %bb4
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
br label %bb4
return: ; preds = %entry
ret void
}