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llvm/test/MC/Mips/mips32r5
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Hrvoje Varga 55b6a233ae [mips] Invalid tests for MTC0, MTC2, MFC0, MFC2, DMTC0, DMFC0 MIPS instructions 
Differential Revision: http://reviews.llvm.org/D18037


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263203 91177308-0d34-0410-b5e6-96231b3b80d8
2016-03-11 08:00:11 +00:00
..
abiflags.s
invalid-mips32.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r2.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r3.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r2.s
invalid.s [mips] Invalid tests for MTC0, MTC2, MFC0, MFC2, DMTC0, DMFC0 MIPS instructions 2016-03-11 08:00:11 +00:00
valid-xfail.s [mips][ias] Removed DSP/DSPr2 instructions from base architecture valid-xfail.s's. 2015-12-07 14:12:44 +00:00
valid.s [mips] Range check uimm20 and fixed a bug this revealed. 2016-02-29 16:06:38 +00:00