llvm/test/MC/Mips/mips32r6
Sagar Thakur c950e912aa [MIPS][LLVM-MC] Fix JR encoding for MIPSR6 ISA
Summary: The assembler was picking the wrong JR variant because the pre-R6 one was still enabled at R6.

Author: nitesh.jain
Reviewers: vkalintiris, dsanders
Subscribers: dsanders, llvm-commits, mohit.bhakkad, sagar, bhushan, jaydeep
Differential: D18387


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265134 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-01 11:55:33 +00:00
..
invalid-mips1-wrong-error.s [mips] Range check simm9 and fix a bug this revealed. 2016-03-31 13:15:23 +00:00
invalid-mips1.s
invalid-mips2-wrong-error.s
invalid-mips2.s
invalid-mips4-wrong-error.s
invalid-mips4.s
invalid-mips5-wrong-error.s
invalid-mips5.s
invalid-mips32-wrong-error.s
invalid-mips32.s
invalid-mips32r2.s
invalid.s [mips] Range check simm11 and mem_simm11. 2016-03-31 14:23:20 +00:00
relocations.s
valid-xfail.s
valid.s [MIPS][LLVM-MC] Fix JR encoding for MIPSR6 ISA 2016-04-01 11:55:33 +00:00