Matt Arsenault bada556f73 AMDGPU: Fix i64 global cmpxchg ... This was using extract_subreg sub0 to extract the low register of the result instead of sub0_sub1, producing an invalid copy. There doesn't seem to be a way to use the compound subreg indices in tablegen since those are generated, so manually select it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272344 91177308-0d34-0410-b5e6-96231b3b80d8		2016-06-09 23:42:48 +00:00
..
AArch64	Reapply "[MBP] Reduce code size by running tail merging in MBP.""	2016-06-09 15:24:29 +00:00
AMDGPU	AMDGPU: Fix i64 global cmpxchg	2016-06-09 23:42:48 +00:00
ARM	Reapply "[MBP] Reduce code size by running tail merging in MBP.""	2016-06-09 15:24:29 +00:00
BPF	[BPF] Remove exit-on-error from tests (PR27768, PR27769)	2016-05-30 08:28:34 +00:00
Generic	Move stackguard test to X86/ directory as it's not generic.	2016-06-09 15:16:58 +00:00
Hexagon	[Hexagon] Enable the post-RA scheduler	2016-05-26 19:44:28 +00:00
Inputs
Lanai
Mips	[mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions	2016-06-09 11:15:53 +00:00
MIR	[llc] Remove exit-on-error flag from MIR tests (PR27770)	2016-06-09 10:31:05 +00:00
MSP430
NVPTX	[NVPTX] Add intrinsics for shfl instructions.	2016-06-09 20:04:08 +00:00
PowerPC	Add aliases for mfvrsave/mtvrsave.	2016-06-09 23:27:48 +00:00
SPARC	[Sparc] Allow passing of empty structs.	2016-06-01 08:48:56 +00:00
SystemZ	[SystemZ] Enable long displacement constraints for inline ASM operands	2016-06-09 15:19:16 +00:00
Thumb	[Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated	2016-06-09 07:39:08 +00:00
Thumb2
WebAssembly	[WebAssembly] Emit type signatures for declared functions	2016-06-03 18:34:36 +00:00
WinEH
X86	[X86][AVX512] Added avx512 VPSLLDQ/VPSRLDQ instruction comments	2016-06-09 22:03:15 +00:00
XCore