llvm/test/MC/Mips/mips32r5
Simon Dardis bc5962ad36 [mips] not instruction alias
This patch adds the single operand form of the not alias to microMIPS and
MIPS along with additional tests.

This partially resolves PR/30381.

Thanks to Sean Bruno for reporting the issue!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287097 91177308-0d34-0410-b5e6-96231b3b80d8
2016-11-16 11:04:49 +00:00
..
abiflags.s
invalid-mips32.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r2.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips32r3.s [mips] Added support for the ERETNC instruction. 2015-07-20 12:28:56 +00:00
invalid-mips64r2.s
invalid.s [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support 2016-07-11 07:41:56 +00:00
valid-xfail.s Recommit: "[mips] Add rsqrt, recip for MIPS" 2016-10-05 16:11:01 +00:00
valid.s [mips] not instruction alias 2016-11-16 11:04:49 +00:00