Michael Liao bf53841cfe Optimize vector select from all 0s or all 1s ...

As packed comparisons in AVX/SSE produce all 0s or all 1s in each SIMD lane,
vector select could be simplified to AND/OR or removed if one or both values
being selected is all 0s or all 1s.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179267 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-11 05:15:54 +00:00

..

AArch64

AArch64: remove barriers from AArch64 atomic operations.

2013-04-08 08:40:41 +00:00

ARM

DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.

2013-04-09 17:41:43 +00:00

CPP

test commit: remove blank line.

2013-03-14 05:43:59 +00:00

Generic

XFAIL some of the generic CodeGen tests for Hexagon.

2013-03-25 21:04:16 +00:00

Hexagon

Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.

2013-03-28 19:34:49 +00:00

Inputs

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

MBlaze

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Mips

Mips specific inline asm memory operand modifier test case

2013-04-10 22:02:32 +00:00

MSP430

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

NVPTX

[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.

2013-03-30 14:29:30 +00:00

PowerPC

Manually remove successors in if conversion when CopyAndPredicateBlock is used

2013-04-10 22:05:25 +00:00

R600

R600/SI: Add pattern for AMDGPUurecip

2013-04-10 17:17:56 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

Compute correct frame sizes for SPARC v9 64-bit frames.

2013-04-09 04:37:47 +00:00

Thumb

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

Thumb2

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07 05:47:54 +00:00

X86

Optimize vector select from all 0s or all 1s

2013-04-11 05:15:54 +00:00

XCore

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00