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59ad77e46e
ARMv8.2-A adds 16-bit floating point versions of all existing SIMD floating-point instructions. This is an optional extension, so all of these instructions require the FeatureFullFP16 subtarget feature. Note that VFP without SIMD is not a valid combination for any version of ARMv8-A, but I have ensured that these instructions all depend on both FeatureNEON and FeatureFullFP16 for consistency. The ".2h" vector type specifier is now legal (for the scalar pairwise reduction instructions), so some unrelated tests have been modified as different error messages are emitted. This is not a problem as the invalid operands are still caught. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255010 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.5 KiB
ArmAsm
64 lines
2.5 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon,+fullfp16 -show-encoding < %s | FileCheck %s
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// Check that the assembler can handle the documented syntax for AArch64
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//----------------------------------------------------------------------
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// Floating-point Reciprocal Step
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//----------------------------------------------------------------------
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frecps h21, h16, h13
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frecps s21, s16, s13
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frecps d22, d30, d21
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// CHECK: frecps h21, h16, h13 // encoding: [0x15,0x3e,0x4d,0x5e]
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// CHECK: frecps s21, s16, s13 // encoding: [0x15,0xfe,0x2d,0x5e]
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// CHECK: frecps d22, d30, d21 // encoding: [0xd6,0xff,0x75,0x5e]
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//----------------------------------------------------------------------
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// Floating-point Reciprocal Square Root Step
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//----------------------------------------------------------------------
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frsqrts h21, h5, h12
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frsqrts s21, s5, s12
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frsqrts d8, d22, d18
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// CHECK: frsqrts h21, h5, h12 // encoding: [0xb5,0x3c,0xcc,0x5e]
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// CHECK: frsqrts s21, s5, s12 // encoding: [0xb5,0xfc,0xac,0x5e]
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// CHECK: frsqrts d8, d22, d18 // encoding: [0xc8,0xfe,0xf2,0x5e]
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//----------------------------------------------------------------------
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// Scalar Floating-point Reciprocal Estimate
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//----------------------------------------------------------------------
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frecpe h19, h14
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frecpe s19, s14
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frecpe d13, d13
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// CHECK: frecpe h19, h14 // encoding: [0xd3,0xd9,0xf9,0x5e]
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// CHECK: frecpe s19, s14 // encoding: [0xd3,0xd9,0xa1,0x5e]
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// CHECK: frecpe d13, d13 // encoding: [0xad,0xd9,0xe1,0x5e]
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//----------------------------------------------------------------------
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// Scalar Floating-point Reciprocal Exponent
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//----------------------------------------------------------------------
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frecpx h18, h10
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frecpx s18, s10
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frecpx d16, d19
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// CHECK: frecpx h18, h10 // encoding: [0x52,0xf9,0xf9,0x5e]
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// CHECK: frecpx s18, s10 // encoding: [0x52,0xf9,0xa1,0x5e]
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// CHECK: frecpx d16, d19 // encoding: [0x70,0xfa,0xe1,0x5e]
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//----------------------------------------------------------------------
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// Scalar Floating-point Reciprocal Square Root Estimate
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//----------------------------------------------------------------------
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frsqrte h22, h13
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frsqrte s22, s13
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frsqrte d21, d12
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// CHECK: frsqrte h22, h13 // encoding: [0xb6,0xd9,0xf9,0x7e]
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// CHECK: frsqrte s22, s13 // encoding: [0xb6,0xd9,0xa1,0x7e]
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// CHECK: frsqrte d21, d12 // encoding: [0x95,0xd9,0xe1,0x7e]
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