llvm/vop3-errs.s at c078bbed70c001ffb0be65bd0f4213aca8362e1d - llvm - Gitea: Git with a cup of tea

RPCSX/llvm

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Tom Stellard 1d53227930 [AMDGPU][llvm-mc] Support for 32-bit inline literals

Patch by: Artem Tamazov

Summary:
Note: Support for 64-bit inline literals TBD
Added: Support of abs/neg modifiers for literals (incomplete; parsing TBD).
Added: Some TODO comments.
Reworked/clarity: rename isInlineImm() to isInlinableImm()
Reworked/robustness: disallow BitsToFloat() with undefined value in isInlinableImm()
Reworked/reuse: isSSrc32/64(), isVSrc32/64()
Tests added.

Reviewers: tstellarAMD, arsenm

Subscribers: vpykhtin, nhaustov, SamWot, arsenm

Projects: #llvm-amdgpu-spb

Differential Revision: http://reviews.llvm.org/D17204

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261559 91177308-0d34-0410-b5e6-96231b3b80d8

2016-02-22 19:17:56 +00:00

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 // RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s
 // RUN: not llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s 2>&1 | FileCheck %s
 v_add_f32_e64 v0, v1
 // CHECK: error: too few operands for instruction
 v_div_scale_f32  v24, vcc, v22, 1.1, v22
 // CHECK: error: invalid operand for instruction