llvm/test/MC/Disassembler
Jack Carter c147b67820 This is a resubmittal. For some reason it broke the bots yesterday
but I cannot reproduce the problem and have scrubed my sources and
even tested with llvm-lit -v --vg.

The Mips RDHWR (Read Hardware Register) instruction was not 
tested for assembler or dissassembler consumption. This patch
adds that functionality.

Contributer: Vladimir Medic
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-17 00:28:20 +00:00
..
ARM Added a option to the disassembler to print immediates as hex. 2012-12-05 18:13:19 +00:00
MBlaze
Mips This is a resubmittal. For some reason it broke the bots yesterday 2013-01-17 00:28:20 +00:00
X86 Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si, cvttss2si, cvtsd2si, and cvttsd2si to match gas behavior. 2013-01-06 20:39:29 +00:00
XCore Add instruction encodings / disassembly support for l2r instructions. 2012-12-17 16:28:02 +00:00