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c34f17140f
llvm
/
test
/
CodeGen
/
Hexagon
History
Jyotsna Verma
c34f17140f
Hexagon: Add support for lowering block address.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@176508
91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-05 19:37:46 +00:00
..
absaddr-store.ll
adde.ll
Hexagon: Expand addc, adde, subc and sube.
2013-03-05 19:04:47 +00:00
args.ll
Hexagon: Add encoding bits to the TFR64 instructions.
2013-03-05 18:42:28 +00:00
block-addr.ll
Hexagon: Add support for lowering block address.
2013-03-05 19:37:46 +00:00
cext-check.ll
cext-valid-packet1.ll
Hexagon: Add constant extender support framework.
2013-03-01 17:37:13 +00:00
cext-valid-packet2.ll
Hexagon: Add constant extender support framework.
2013-03-01 17:37:13 +00:00
cmp_pred_reg.ll
cmp_pred.ll
cmp-to-genreg.ll
cmp-to-predreg.ll
cmpb_pred.ll
combine_ir.ll
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
ctlz-cttz-ctpop.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll
Hexagon: Add encoding bits to the TFR64 instructions.
2013-03-05 18:42:28 +00:00
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll
gp-plus-offset-store.ll
hwloop-cleanup.ll
hwloop-const.ll
hwloop-dbg.ll
hwloop-le.ll
hwloop-lt1.ll
hwloop-lt.ll
hwloop-ne.ll
idxload-with-zero-offset.ll
indirect-br.ll
Hexagon: Add support for lowering block address.
2013-03-05 19:37:46 +00:00
lit.local.cfg
macint.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
postinc-load.ll
postinc-store.ll
pred-absolute-store.ll
predicate-copy.ll
remove_lsr.ll
simpletailcall.ll
static.ll
struct_args_large.ll
struct_args.ll
sube.ll
Hexagon: Expand addc, adde, subc and sube.
2013-03-05 19:04:47 +00:00
vaddh.ll
validate-offset.ll