Jakob Stoklund Olesen c3ff3f42ee Add 64-bit shift instructions. ...

SPARC v9 defines new 64-bit shift instructions. The 32-bit shift right
instructions are still usable as zero and sign extensions.

This adds new F3_Sr and F3_Si instruction formats that probably should
be used for the 32-bit shifts as well. They don't really encode an
simm13 field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178525 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-02 04:09:12 +00:00

..

Analysis

Build fixes for STLPort + GCC

2013-03-29 18:48:45 +00:00

Archive

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AsmParser

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Bitcode

Whitespace cleanup

2013-04-01 02:28:07 +00:00

CodeGen

Merge load/store sequences with adresses: base + index + offset

2013-04-01 18:12:58 +00:00

DebugInfo

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ExecutionEngine

Add support for vector data types in the LLVM interpreter.

2013-04-01 15:53:30 +00:00

IR

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

IRReader

Fix top-comment header and some indentation

2013-04-01 19:47:56 +00:00

Linker

Specutively revert r178130.

2013-03-27 17:54:41 +00:00

MC

Mips direct object exception handling regression

2013-04-01 21:55:15 +00:00

Object

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Option

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Support

Put private class into an anonmyous namespace.

2013-03-30 15:23:08 +00:00

TableGen

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Target

Add 64-bit shift instructions.

2013-04-02 04:09:12 +00:00

Transforms

Correct assertion condition

2013-04-01 18:13:05 +00:00

CMakeLists.txt

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00

LLVMBuild.txt

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00

Makefile

Split out the IRReader header and the utility functions it provides into

2013-03-26 02:25:37 +00:00