mirror of
https://github.com/RPCSX/llvm.git
synced 2024-12-03 17:31:50 +00:00
9e08876a2a
instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
521 B
LLVM
23 lines
521 B
LLVM
; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=V6
|
|
; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5
|
|
; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI
|
|
; rdar://r6949835
|
|
|
|
@b = external global i64*
|
|
|
|
define i64 @t(i64 %a) nounwind readonly {
|
|
entry:
|
|
;V6: ldrd r2, [r2]
|
|
|
|
;V5: ldr r3, [r2]
|
|
;V5: ldr r2, [r2, #4]
|
|
|
|
;EABI: ldr r3, [r2]
|
|
;EABI: ldr r2, [r2, #4]
|
|
|
|
%0 = load i64** @b, align 4
|
|
%1 = load i64* %0, align 4
|
|
%2 = mul i64 %1, %a
|
|
ret i64 %2
|
|
}
|