Misha Brukman c740aae220 Moved code to modify the opcode from 'reg' to 'imm' form to a more logical place. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6563 91177308-0d34-0410-b5e6-96231b3b80d8

2003-06-03 03:18:20 +00:00

..

InstrSched

Remove usage of noncopyable classes to clean up doxygen output.

2003-06-02 22:45:07 +00:00

InstrSelection

Moved code to modify the opcode from 'reg' to 'imm' form to a more logical place.

2003-06-03 03:18:20 +00:00

Mapping

Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific.

2003-06-02 23:27:09 +00:00

ModuloScheduling

compiled with the new SchedGraphCommon

2003-06-02 17:48:56 +00:00

PostOpts

Peephole optimization pass on final machine code.

2002-09-20 00:42:11 +00:00

PreOpts

Moving these files from Code/PreSelection to here.

2002-09-20 00:29:28 +00:00

RegAlloc

Minor changes.

2003-05-31 07:41:54 +00:00

LiveVariables.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

MachineCodeEmitter.cpp

Removed a useless ofstream.

2003-06-02 20:49:09 +00:00

MachineCodeForInstruction.cpp

Move CallArgsDescriptor into this class instead of making it an

2002-10-29 19:38:46 +00:00

MachineFunction.cpp

Remove unneccesary &*

2003-04-23 16:36:11 +00:00

MachineInstr.cpp

Allow explicit physical registers for implicit operands.

2003-05-31 07:39:06 +00:00

MachineInstrAnnot.cpp

Prune #includes

2003-01-15 19:48:13 +00:00

Makefile

Initial checkin of codegen infrastructure for LLVM-JIT

2002-10-25 22:54:41 +00:00

PHIElimination.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

PrologEpilogInserter.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocLocal.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00

RegAllocSimple.cpp

(1) Added special register class containing (for now) %fsr.

2003-05-27 00:05:23 +00:00