Saleem Abdulrasool 6530b2f3a0 X86: loosen an overly aggressive MachO assertion ... We would assert that the FP setup CFI used esp/rsp always. This held up in practice when the code was generated from IR. However, with the integrated assembler, it is possible to have the input be user specified assembly. In such a case, we cannot assume that the function implementation has a compact unwind representation. Loosen the assertion into a check and bail if we cannot represent the frame pointer in the compact unwinding. Addresses PR30453! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281986 91177308-0d34-0410-b5e6-96231b3b80d8		2016-09-20 17:05:04 +00:00
..
AlignedBundling	Revert r265817	2016-04-08 18:15:37 +00:00
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s	[AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions.	2016-08-03 10:58:05 +00:00
avx512-err.s
avx512bw-encoding.s
avx512ifma-encoding.s
avx512ifmavl-encoding.s
avx512vbmi-encoding.s
avx512vl-encoding.s
cfi_def_cfa-crash.s
compact-unwind.s
encoder-fail.s
error-reloc.s
expand-var.s
faultmap-section-parsing.s
fde-reloc.s
fixup-cpu-mode.s	Revert r265817	2016-04-08 18:15:37 +00:00
fp-setup-macho.s	X86: loosen an overly aggressive MachO assertion	2016-09-20 17:05:04 +00:00
gnux32-dwarf-gen.s
hex-immediates.s	Revert r265817	2016-04-08 18:15:37 +00:00
i386-darwin-frame-register.ll	[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.	2016-04-15 15:57:41 +00:00
imm-comments.s	[x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)	2016-05-28 14:58:37 +00:00
index-operations.s
inline-asm-obj.ll
intel-syntax-2.s
intel-syntax-ambiguous.s
intel-syntax-avx512.s	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s	[MC] Fix Intel Operand assembly parsing for .set ids	2016-08-02 17:56:03 +00:00
intel-syntax-error.s	[MC] Fix Intel Operand assembly parsing for .set ids	2016-08-02 17:56:03 +00:00
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-print.ll
intel-syntax-ptr-sized.s
intel-syntax-unsized-memory.s
intel-syntax-x86-64-avx512f_vl.s	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
intel-syntax-x86-64-avx.s	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
intel-syntax.s	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
invalid_opcode.s	[llvm-objdump] Print <unknown> in place of instruction text if it couldn't be disassembled.	2016-03-18 16:26:48 +00:00
invalid-sleb.s
large-bss.s
lit.local.cfg
macho-reloc-errors-x86_64.s
macho-reloc-errors-x86.s
macho-uleb.s
mpx-encodings.s	[X86] Decode MPX BND registers.	2016-07-14 14:53:21 +00:00
no-elf-compact-unwind.s
padlock.s
pr28547.s	[X86][MC] Fix bracket expression parsing in intel-style assembly.	2016-07-14 17:37:05 +00:00
relax-insn.s
reloc-bss.s	[MC] Don't crash when trying to emit a relocation against .bss.	2016-07-26 18:16:33 +00:00
reloc-directive.s
reloc-macho.s
reloc-undef-global.s
ret.s
sgx-encoding.s
shuffle-comments.s
stackmap-nops.ll
validate-inst-att.s
validate-inst-intel.s
variant-diagnostics.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	[X86] Don't allow DR8-DR15 to be assembled in 32-bit mode. Add missing test for CR8-CR15.	2016-08-27 17:13:34 +00:00
x86_long_nop.s	[X86] Restrict max long nop length for Lakemont.	2016-04-11 10:07:36 +00:00
x86_nop.s
x86_operands.s
x86-16.s	[X86] Improve code size on X86 segment moves	2016-08-08 18:01:04 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s	[X86] Improve code size on X86 segment moves	2016-08-08 18:01:04 +00:00
x86-64-avx512bw_vl.s	[AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW.	2016-05-01 17:38:32 +00:00
x86-64-avx512bw.s	[AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW.	2016-05-01 17:38:32 +00:00
x86-64-avx512cd_vl.s
x86-64-avx512cd.s
x86-64-avx512dq_vl.s
x86-64-avx512dq.s
x86-64-avx512f_vl.s
x86-64.s	Permit memory operands in ins/outs instructions	2016-06-29 19:54:27 +00:00
x86-branch-relaxation.s	Fix branch relaxation in 16-bit mode.	2016-07-11 14:23:53 +00:00
x86-evenDirective.s
x86-itanium.ll
x86-target-directives.s
x86-windows-itanium-libcalls.ll
X86_64-pku.s