llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

53 lines
1.7 KiB
LLVM

; REQUIRES: asserts
; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
; Now this test spills one register. But a reload in the loop is cheaper than
; the divsd so it's a win.
define fastcc void @fourn(double* %data, i32 %isign) nounwind {
; CHECK: fourn
entry:
br label %bb
bb: ; preds = %bb, %entry
%indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
%idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
%0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
%1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
br i1 %1, label %bb30.loopexit, label %bb
; CHECK: %bb30.loopexit
; CHECK: divsd %xmm0
; CHECK: movsd %xmm0, 16(%esp)
; CHECK: %bb3
bb3: ; preds = %bb30.loopexit, %bb25, %bb3
%2 = load i32, i32* null, align 4 ; <i32> [#uses=1]
%3 = mul i32 %2, 0 ; <i32> [#uses=1]
%4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
br i1 %4, label %bb18, label %bb3
bb18: ; preds = %bb3
%5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
%6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
br label %bb24.preheader
bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
br label %bb22.preheader
bb25: ; preds = %bb24.preheader
%7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]
%8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]
%9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]
br i1 %9, label %bb3, label %bb24.preheader
bb24.preheader: ; preds = %bb25, %bb18
%i3.122100 = or i32 0, 1 ; <i32> [#uses=2]
%10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]
br i1 %10, label %bb25, label %bb22.preheader
bb30.loopexit: ; preds = %bb
%11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]
br label %bb3
}
declare double @sin(double) nounwind readonly